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[libata] sata_mv: cache frequently-accessed registers
Maintain a local (mv_port_priv) cache of frequently accessed registers, to avoid having to re-read them (very slow) on every transistion between EDMA and non-EDMA modes. This speeds up things like flushing the drive write cache, and anything using basic DMA transfers. Signed-off-by: Mark Lord <mlord@pobox.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
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a5bfc4714b
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08da175937
1 changed files with 70 additions and 21 deletions
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@ -438,6 +438,17 @@ struct mv_sg {
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__le32 reserved;
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};
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/*
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* We keep a local cache of a few frequently accessed port
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* registers here, to avoid having to read them (very slow)
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* when switching between EDMA and non-EDMA modes.
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*/
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struct mv_cached_regs {
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u32 fiscfg;
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u32 ltmode;
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u32 haltcond;
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};
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struct mv_port_priv {
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struct mv_crqb *crqb;
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dma_addr_t crqb_dma;
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@ -450,6 +461,7 @@ struct mv_port_priv {
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unsigned int resp_idx;
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u32 pp_flags;
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struct mv_cached_regs cached;
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unsigned int delayed_eh_pmp_map;
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};
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@ -812,6 +824,43 @@ static inline int mv_get_hc_count(unsigned long port_flags)
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return ((port_flags & MV_FLAG_DUAL_HC) ? 2 : 1);
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}
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/**
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* mv_save_cached_regs - (re-)initialize cached port registers
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* @ap: the port whose registers we are caching
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*
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* Initialize the local cache of port registers,
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* so that reading them over and over again can
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* be avoided on the hotter paths of this driver.
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* This saves a few microseconds each time we switch
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* to/from EDMA mode to perform (eg.) a drive cache flush.
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*/
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static void mv_save_cached_regs(struct ata_port *ap)
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{
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void __iomem *port_mmio = mv_ap_base(ap);
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struct mv_port_priv *pp = ap->private_data;
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pp->cached.fiscfg = readl(port_mmio + FISCFG_OFS);
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pp->cached.ltmode = readl(port_mmio + LTMODE_OFS);
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pp->cached.haltcond = readl(port_mmio + EDMA_HALTCOND_OFS);
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}
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/**
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* mv_write_cached_reg - write to a cached port register
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* @addr: hardware address of the register
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* @old: pointer to cached value of the register
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* @new: new value for the register
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*
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* Write a new value to a cached register,
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* but only if the value is different from before.
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*/
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static inline void mv_write_cached_reg(void __iomem *addr, u32 *old, u32 new)
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{
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if (new != *old) {
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*old = new;
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writel(new, addr);
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}
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}
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static void mv_set_edma_ptrs(void __iomem *port_mmio,
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struct mv_host_priv *hpriv,
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struct mv_port_priv *pp)
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@ -1159,35 +1208,33 @@ static int mv_qc_defer(struct ata_queued_cmd *qc)
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return ATA_DEFER_PORT;
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}
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static void mv_config_fbs(void __iomem *port_mmio, int want_ncq, int want_fbs)
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static void mv_config_fbs(struct ata_port *ap, int want_ncq, int want_fbs)
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{
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u32 new_fiscfg, old_fiscfg;
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u32 new_ltmode, old_ltmode;
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u32 new_haltcond, old_haltcond;
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struct mv_port_priv *pp = ap->private_data;
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void __iomem *port_mmio;
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old_fiscfg = readl(port_mmio + FISCFG_OFS);
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old_ltmode = readl(port_mmio + LTMODE_OFS);
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old_haltcond = readl(port_mmio + EDMA_HALTCOND_OFS);
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u32 fiscfg, *old_fiscfg = &pp->cached.fiscfg;
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u32 ltmode, *old_ltmode = &pp->cached.ltmode;
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u32 haltcond, *old_haltcond = &pp->cached.haltcond;
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new_fiscfg = old_fiscfg & ~(FISCFG_SINGLE_SYNC | FISCFG_WAIT_DEV_ERR);
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new_ltmode = old_ltmode & ~LTMODE_BIT8;
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new_haltcond = old_haltcond | EDMA_ERR_DEV;
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ltmode = *old_ltmode & ~LTMODE_BIT8;
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haltcond = *old_haltcond | EDMA_ERR_DEV;
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if (want_fbs) {
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new_fiscfg = old_fiscfg | FISCFG_SINGLE_SYNC;
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new_ltmode = old_ltmode | LTMODE_BIT8;
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fiscfg = *old_fiscfg | FISCFG_SINGLE_SYNC;
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ltmode = *old_ltmode | LTMODE_BIT8;
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if (want_ncq)
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new_haltcond &= ~EDMA_ERR_DEV;
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haltcond &= ~EDMA_ERR_DEV;
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else
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new_fiscfg |= FISCFG_WAIT_DEV_ERR;
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fiscfg |= FISCFG_WAIT_DEV_ERR;
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} else {
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fiscfg = *old_fiscfg & ~(FISCFG_SINGLE_SYNC | FISCFG_WAIT_DEV_ERR);
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}
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if (new_fiscfg != old_fiscfg)
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writelfl(new_fiscfg, port_mmio + FISCFG_OFS);
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if (new_ltmode != old_ltmode)
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writelfl(new_ltmode, port_mmio + LTMODE_OFS);
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if (new_haltcond != old_haltcond)
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writelfl(new_haltcond, port_mmio + EDMA_HALTCOND_OFS);
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port_mmio = mv_ap_base(ap);
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mv_write_cached_reg(port_mmio + FISCFG_OFS, old_fiscfg, fiscfg);
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mv_write_cached_reg(port_mmio + LTMODE_OFS, old_ltmode, ltmode);
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mv_write_cached_reg(port_mmio + EDMA_HALTCOND_OFS, old_haltcond, haltcond);
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}
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static void mv_60x1_errata_sata25(struct ata_port *ap, int want_ncq)
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@ -1235,7 +1282,7 @@ static void mv_edma_cfg(struct ata_port *ap, int want_ncq, int want_edma)
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*/
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want_fbs &= want_ncq;
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mv_config_fbs(port_mmio, want_ncq, want_fbs);
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mv_config_fbs(ap, want_ncq, want_fbs);
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if (want_fbs) {
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pp->pp_flags |= MV_PP_FLAG_FBS_EN;
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@ -1339,6 +1386,7 @@ static int mv_port_start(struct ata_port *ap)
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pp->sg_tbl_dma[tag] = pp->sg_tbl_dma[0];
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}
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}
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mv_save_cached_regs(ap);
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mv_edma_cfg(ap, 0, 0);
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return 0;
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@ -2997,6 +3045,7 @@ static int mv_hardreset(struct ata_link *link, unsigned int *class,
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extra = HZ; /* only extend it once, max */
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}
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} while (sstatus != 0x0 && sstatus != 0x113 && sstatus != 0x123);
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mv_save_cached_regs(ap);
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mv_edma_cfg(ap, 0, 0);
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return rc;
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