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https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-08-26 10:49:33 +00:00
forcedeth: Kill NAPI config options.
All distributions enable it, therefore no significant body of users are even testing the driver with it disabled. And making NAPI configurable is heavily discouraged anyways. I left the MSI-X interrupt enabling thing in an "#if 0" block so hopefully someone can debug that and it can get re-enabled. Probably it was just one of the NVIDIA chipset MSI erratas that we work handle these days in the PCI quirks (see drivers/pci/quirks.c and stuff like nvenet_msi_disable()). Signed-off-by: David S. Miller <davem@davemloft.net>
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53f224cc5f
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2 changed files with 1 additions and 207 deletions
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@ -1453,20 +1453,6 @@ config FORCEDETH
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To compile this driver as a module, choose M here. The module
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will be called forcedeth.
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config FORCEDETH_NAPI
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bool "Use Rx Polling (NAPI) (EXPERIMENTAL)"
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depends on FORCEDETH && EXPERIMENTAL
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help
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NAPI is a new driver API designed to reduce CPU and interrupt load
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when the driver is receiving lots of packets from the card. It is
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still somewhat experimental and thus not yet enabled by default.
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If your estimated Rx load is 10kpps or more, or if the card will be
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deployed on potentially unfriendly networks (e.g. in a firewall),
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then say Y here.
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If in doubt, say N.
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config CS89x0
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tristate "CS89x0 support"
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depends on NET_ETHERNET && (ISA || EISA || MACH_IXDP2351 \
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@ -1104,20 +1104,16 @@ static void nv_disable_hw_interrupts(struct net_device *dev, u32 mask)
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static void nv_napi_enable(struct net_device *dev)
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{
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#ifdef CONFIG_FORCEDETH_NAPI
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struct fe_priv *np = get_nvpriv(dev);
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napi_enable(&np->napi);
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#endif
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}
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static void nv_napi_disable(struct net_device *dev)
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{
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#ifdef CONFIG_FORCEDETH_NAPI
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struct fe_priv *np = get_nvpriv(dev);
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napi_disable(&np->napi);
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#endif
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}
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#define MII_READ (-1)
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@ -1810,7 +1806,6 @@ static int nv_alloc_rx_optimized(struct net_device *dev)
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}
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/* If rx bufs are exhausted called after 50ms to attempt to refresh */
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#ifdef CONFIG_FORCEDETH_NAPI
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static void nv_do_rx_refill(unsigned long data)
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{
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struct net_device *dev = (struct net_device *) data;
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@ -1819,41 +1814,6 @@ static void nv_do_rx_refill(unsigned long data)
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/* Just reschedule NAPI rx processing */
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napi_schedule(&np->napi);
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}
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#else
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static void nv_do_rx_refill(unsigned long data)
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{
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struct net_device *dev = (struct net_device *) data;
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struct fe_priv *np = netdev_priv(dev);
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int retcode;
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if (!using_multi_irqs(dev)) {
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if (np->msi_flags & NV_MSI_X_ENABLED)
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disable_irq(np->msi_x_entry[NV_MSI_X_VECTOR_ALL].vector);
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else
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disable_irq(np->pci_dev->irq);
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} else {
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disable_irq(np->msi_x_entry[NV_MSI_X_VECTOR_RX].vector);
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}
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if (!nv_optimized(np))
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retcode = nv_alloc_rx(dev);
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else
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retcode = nv_alloc_rx_optimized(dev);
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if (retcode) {
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spin_lock_irq(&np->lock);
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if (!np->in_shutdown)
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mod_timer(&np->oom_kick, jiffies + OOM_REFILL);
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spin_unlock_irq(&np->lock);
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}
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if (!using_multi_irqs(dev)) {
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if (np->msi_flags & NV_MSI_X_ENABLED)
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enable_irq(np->msi_x_entry[NV_MSI_X_VECTOR_ALL].vector);
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else
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enable_irq(np->pci_dev->irq);
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} else {
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enable_irq(np->msi_x_entry[NV_MSI_X_VECTOR_RX].vector);
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}
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}
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#endif
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static void nv_init_rx(struct net_device *dev)
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{
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@ -2816,11 +2776,7 @@ static int nv_rx_process(struct net_device *dev, int limit)
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skb->protocol = eth_type_trans(skb, dev);
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dprintk(KERN_DEBUG "%s: nv_rx_process: %d bytes, proto %d accepted.\n",
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dev->name, len, skb->protocol);
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#ifdef CONFIG_FORCEDETH_NAPI
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napi_gro_receive(&np->napi, skb);
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#else
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netif_rx(skb);
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#endif
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dev->stats.rx_packets++;
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dev->stats.rx_bytes += len;
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next_pkt:
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@ -2909,27 +2865,14 @@ static int nv_rx_process_optimized(struct net_device *dev, int limit)
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dev->name, len, skb->protocol);
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if (likely(!np->vlangrp)) {
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#ifdef CONFIG_FORCEDETH_NAPI
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napi_gro_receive(&np->napi, skb);
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#else
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netif_rx(skb);
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#endif
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} else {
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vlanflags = le32_to_cpu(np->get_rx.ex->buflow);
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if (vlanflags & NV_RX3_VLAN_TAG_PRESENT) {
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#ifdef CONFIG_FORCEDETH_NAPI
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vlan_gro_receive(&np->napi, np->vlangrp,
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vlanflags & NV_RX3_VLAN_TAG_MASK, skb);
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#else
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vlan_hwaccel_rx(skb, np->vlangrp,
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vlanflags & NV_RX3_VLAN_TAG_MASK);
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#endif
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} else {
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#ifdef CONFIG_FORCEDETH_NAPI
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napi_gro_receive(&np->napi, skb);
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#else
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netif_rx(skb);
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#endif
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}
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}
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@ -3496,10 +3439,6 @@ static irqreturn_t nv_nic_irq(int foo, void *data)
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struct net_device *dev = (struct net_device *) data;
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struct fe_priv *np = netdev_priv(dev);
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u8 __iomem *base = get_hwbase(dev);
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#ifndef CONFIG_FORCEDETH_NAPI
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int total_work = 0;
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int loop_count = 0;
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#endif
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dprintk(KERN_DEBUG "%s: nv_nic_irq\n", dev->name);
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@ -3516,7 +3455,6 @@ static irqreturn_t nv_nic_irq(int foo, void *data)
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nv_msi_workaround(np);
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#ifdef CONFIG_FORCEDETH_NAPI
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if (napi_schedule_prep(&np->napi)) {
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/*
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* Disable further irq's (msix not enabled with napi)
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@ -3525,65 +3463,6 @@ static irqreturn_t nv_nic_irq(int foo, void *data)
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__napi_schedule(&np->napi);
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}
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#else
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do
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{
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int work = 0;
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if ((work = nv_rx_process(dev, RX_WORK_PER_LOOP))) {
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if (unlikely(nv_alloc_rx(dev))) {
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spin_lock(&np->lock);
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if (!np->in_shutdown)
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mod_timer(&np->oom_kick, jiffies + OOM_REFILL);
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spin_unlock(&np->lock);
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}
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}
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spin_lock(&np->lock);
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work += nv_tx_done(dev, TX_WORK_PER_LOOP);
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spin_unlock(&np->lock);
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if (!work)
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break;
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total_work += work;
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loop_count++;
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}
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while (loop_count < max_interrupt_work);
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if (nv_change_interrupt_mode(dev, total_work)) {
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/* setup new irq mask */
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writel(np->irqmask, base + NvRegIrqMask);
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}
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if (unlikely(np->events & NVREG_IRQ_LINK)) {
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spin_lock(&np->lock);
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nv_link_irq(dev);
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spin_unlock(&np->lock);
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}
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if (unlikely(np->need_linktimer && time_after(jiffies, np->link_timeout))) {
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spin_lock(&np->lock);
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nv_linkchange(dev);
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spin_unlock(&np->lock);
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np->link_timeout = jiffies + LINK_TIMEOUT;
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}
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if (unlikely(np->events & NVREG_IRQ_RECOVER_ERROR)) {
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spin_lock(&np->lock);
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/* disable interrupts on the nic */
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if (!(np->msi_flags & NV_MSI_X_ENABLED))
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writel(0, base + NvRegIrqMask);
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else
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writel(np->irqmask, base + NvRegIrqMask);
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pci_push(base);
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if (!np->in_shutdown) {
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np->nic_poll_irq = np->irqmask;
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np->recover_error = 1;
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mod_timer(&np->nic_poll, jiffies + POLL_WAIT);
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}
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spin_unlock(&np->lock);
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}
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#endif
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dprintk(KERN_DEBUG "%s: nv_nic_irq completed\n", dev->name);
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return IRQ_HANDLED;
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struct net_device *dev = (struct net_device *) data;
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struct fe_priv *np = netdev_priv(dev);
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u8 __iomem *base = get_hwbase(dev);
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#ifndef CONFIG_FORCEDETH_NAPI
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int total_work = 0;
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int loop_count = 0;
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#endif
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dprintk(KERN_DEBUG "%s: nv_nic_irq_optimized\n", dev->name);
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nv_msi_workaround(np);
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#ifdef CONFIG_FORCEDETH_NAPI
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if (napi_schedule_prep(&np->napi)) {
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/*
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* Disable further irq's (msix not enabled with napi)
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writel(0, base + NvRegIrqMask);
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__napi_schedule(&np->napi);
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}
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#else
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do
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{
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int work = 0;
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if ((work = nv_rx_process_optimized(dev, RX_WORK_PER_LOOP))) {
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if (unlikely(nv_alloc_rx_optimized(dev))) {
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spin_lock(&np->lock);
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if (!np->in_shutdown)
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mod_timer(&np->oom_kick, jiffies + OOM_REFILL);
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spin_unlock(&np->lock);
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}
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}
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spin_lock(&np->lock);
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work += nv_tx_done_optimized(dev, TX_WORK_PER_LOOP);
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spin_unlock(&np->lock);
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if (!work)
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break;
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total_work += work;
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loop_count++;
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}
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while (loop_count < max_interrupt_work);
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if (nv_change_interrupt_mode(dev, total_work)) {
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/* setup new irq mask */
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writel(np->irqmask, base + NvRegIrqMask);
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}
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if (unlikely(np->events & NVREG_IRQ_LINK)) {
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spin_lock(&np->lock);
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nv_link_irq(dev);
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spin_unlock(&np->lock);
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}
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if (unlikely(np->need_linktimer && time_after(jiffies, np->link_timeout))) {
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spin_lock(&np->lock);
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nv_linkchange(dev);
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spin_unlock(&np->lock);
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np->link_timeout = jiffies + LINK_TIMEOUT;
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}
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if (unlikely(np->events & NVREG_IRQ_RECOVER_ERROR)) {
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spin_lock(&np->lock);
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/* disable interrupts on the nic */
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if (!(np->msi_flags & NV_MSI_X_ENABLED))
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writel(0, base + NvRegIrqMask);
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else
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writel(np->irqmask, base + NvRegIrqMask);
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pci_push(base);
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if (!np->in_shutdown) {
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np->nic_poll_irq = np->irqmask;
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np->recover_error = 1;
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mod_timer(&np->nic_poll, jiffies + POLL_WAIT);
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}
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spin_unlock(&np->lock);
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}
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#endif
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dprintk(KERN_DEBUG "%s: nv_nic_irq_optimized completed\n", dev->name);
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return IRQ_HANDLED;
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return IRQ_RETVAL(i);
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}
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#ifdef CONFIG_FORCEDETH_NAPI
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static int nv_napi_poll(struct napi_struct *napi, int budget)
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{
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struct fe_priv *np = container_of(napi, struct fe_priv, napi);
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}
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return rx_work;
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}
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#endif
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static irqreturn_t nv_nic_irq_rx(int foo, void *data)
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{
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np->txrxctl_bits |= NVREG_TXRXCTL_RXCHECK;
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dev->features |= NETIF_F_IP_CSUM | NETIF_F_SG;
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dev->features |= NETIF_F_TSO;
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#ifdef CONFIG_FORCEDETH_NAPI
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dev->features |= NETIF_F_GRO;
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#endif
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}
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np->vlanctl_bits = 0;
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else
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dev->netdev_ops = &nv_netdev_ops_optimized;
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#ifdef CONFIG_FORCEDETH_NAPI
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netif_napi_add(dev, &np->napi, nv_napi_poll, RX_WORK_PER_LOOP);
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#endif
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SET_ETHTOOL_OPS(dev, &ops);
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dev->watchdog_timeo = NV_WATCHDOG_TIMEO;
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/* msix has had reported issues when modifying irqmask
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as in the case of napi, therefore, disable for now
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*/
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#ifndef CONFIG_FORCEDETH_NAPI
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#if 0
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np->msi_flags |= NV_MSI_X_CAPABLE;
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#endif
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}
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