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dt-bindings: memory: convert TI a8xx DDR2/mDDR memory controller to dtschema

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Convert Texas Instruments da8xx DDR2/mDDR memory controller bindings to
DT schema format using json-schema.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Link: https://lore.kernel.org/r/20210818113248.85084-1-krzysztof.kozlowski@canonical.com
Signed-off-by: Rob Herring <robh@kernel.org>
This commit is contained in:
Krzysztof Kozlowski 2021-08-18 13:32:48 +02:00 committed by Rob Herring
parent 47e397a575
commit 0a7eb4fe83
2 changed files with 35 additions and 20 deletions
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35
Documentation/devicetree/bindings/memory-controllers/ti,da8xx-ddrctl.yaml Normal file
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/memory-controllers/ti,da8xx-ddrctl.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Texas Instruments da8xx DDR2/mDDR memory controller
maintainers:
- Bartosz Golaszewski <bgolaszewski@baylibre.com>
- Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
description: |
Documentation:
OMAP-L138 (DA850) - http://www.ti.com/lit/ug/spruh82c/spruh82c.pdf
properties:
compatible:
const: ti,da850-ddr-controller
reg:
maxItems: 1
required:
- compatible
- reg
additionalProperties: false
examples:
- |
memory-controller@b0000000 {
compatible = "ti,da850-ddr-controller";
reg = <0xb0000000 0xe8>;
};

20
Documentation/devicetree/bindings/memory-controllers/ti-da8xx-ddrctl.txt
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@ -1,20 +0,0 @@
* Device tree bindings for Texas Instruments da8xx DDR2/mDDR memory controller
The DDR2/mDDR memory controller present on Texas Instruments da8xx SoCs features
a set of registers which allow to tweak the controller's behavior.
Documentation:
OMAP-L138 (DA850) - http://www.ti.com/lit/ug/spruh82c/spruh82c.pdf
Required properties:
- compatible: "ti,da850-ddr-controller" - for da850 SoC based boards
- reg: a tuple containing the base address of the memory
controller and the size of the memory area to map
Example for da850 shown below.
ddrctl {
compatible = "ti,da850-ddr-controller";
reg = <0xb0000000 0xe8>;
};