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clk: rockchip: use separate compatibles for rk3288w-cru
Commit 1627f68363
("clk: rockchip: Handle clock tree for rk3288w variant")
added the check for rk3288w-specific clock-tree changes but in turn would
require a double-compatible due to re-using the main rockchip,rk3288-cru
compatible as entry point.
The binding change actually describes the compatibles as one or the other
so adapt the code accordingly and add a real second entry-point for the
clock controller.
Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Ezequiel Garcia <ezequiel@collabora.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com> # rock-pi-n8
Link: https://lore.kernel.org/r/20200703154948.260369-1-heiko@sntech.de
This commit is contained in:
parent
00bd404144
commit
0a7f99aad2
1 changed files with 19 additions and 2 deletions
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@ -15,6 +15,11 @@
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#define RK3288_GRF_SOC_CON(x) (0x244 + x * 4)
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#define RK3288_GRF_SOC_CON(x) (0x244 + x * 4)
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#define RK3288_GRF_SOC_STATUS1 0x284
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#define RK3288_GRF_SOC_STATUS1 0x284
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enum rk3288_variant {
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RK3288_CRU,
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RK3288W_CRU,
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};
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enum rk3288_plls {
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enum rk3288_plls {
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apll, dpll, cpll, gpll, npll,
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apll, dpll, cpll, gpll, npll,
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};
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};
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@ -922,7 +927,8 @@ static struct syscore_ops rk3288_clk_syscore_ops = {
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.resume = rk3288_clk_resume,
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.resume = rk3288_clk_resume,
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};
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};
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static void __init rk3288_clk_init(struct device_node *np)
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static void __init rk3288_common_init(struct device_node *np,
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enum rk3288_variant soc)
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{
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{
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struct rockchip_clk_provider *ctx;
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struct rockchip_clk_provider *ctx;
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@ -945,7 +951,7 @@ static void __init rk3288_clk_init(struct device_node *np)
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rockchip_clk_register_branches(ctx, rk3288_clk_branches,
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rockchip_clk_register_branches(ctx, rk3288_clk_branches,
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ARRAY_SIZE(rk3288_clk_branches));
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ARRAY_SIZE(rk3288_clk_branches));
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if (of_device_is_compatible(np, "rockchip,rk3288w-cru"))
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if (soc == RK3288W_CRU)
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rockchip_clk_register_branches(ctx, rk3288w_hclkvio_branch,
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rockchip_clk_register_branches(ctx, rk3288w_hclkvio_branch,
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ARRAY_SIZE(rk3288w_hclkvio_branch));
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ARRAY_SIZE(rk3288w_hclkvio_branch));
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else
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else
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@ -970,4 +976,15 @@ static void __init rk3288_clk_init(struct device_node *np)
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rockchip_clk_of_add_provider(np, ctx);
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rockchip_clk_of_add_provider(np, ctx);
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}
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}
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static void __init rk3288_clk_init(struct device_node *np)
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{
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rk3288_common_init(np, RK3288_CRU);
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}
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CLK_OF_DECLARE(rk3288_cru, "rockchip,rk3288-cru", rk3288_clk_init);
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CLK_OF_DECLARE(rk3288_cru, "rockchip,rk3288-cru", rk3288_clk_init);
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static void __init rk3288w_clk_init(struct device_node *np)
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{
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rk3288_common_init(np, RK3288W_CRU);
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}
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CLK_OF_DECLARE(rk3288w_cru, "rockchip,rk3288w-cru", rk3288w_clk_init);
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