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mmc: renesas_sdhi: special 4tap settings only apply to HS400
commit46d4820f94
upstream. Previous documentation was vague, so we included SDR104 for slow SDnH clock settings. It turns out now, that it is only needed for HS400. Fixes:bb6d3fa98a
("clk: renesas: rcar-gen3: Switch to new SD clock handling") Cc: stable@vger.kernel.org Reported-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/20220404100508.3209-1-wsa+renesas@sang-engineering.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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1 changed files with 2 additions and 2 deletions
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@ -144,9 +144,9 @@ static unsigned int renesas_sdhi_clk_update(struct tmio_mmc_host *host,
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return clk_get_rate(priv->clk);
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if (priv->clkh) {
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/* HS400 with 4TAP needs different clock settings */
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bool use_4tap = priv->quirks && priv->quirks->hs400_4taps;
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bool need_slow_clkh = (host->mmc->ios.timing == MMC_TIMING_UHS_SDR104) ||
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(host->mmc->ios.timing == MMC_TIMING_MMC_HS400);
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bool need_slow_clkh = host->mmc->ios.timing == MMC_TIMING_MMC_HS400;
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clkh_shift = use_4tap && need_slow_clkh ? 1 : 2;
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ref_clk = priv->clkh;
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}
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