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[POWERPC] Fix 8xx build breakage due to _tlbie changes
My changes to _tlbie to fix 4xx unfortunately broke 8xx build in a couple of places. This fixes it. Spotted by Olof Johansson. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Vitaly Bordug <vitb@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
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parent
072ef40e08
commit
0b47759db5
4 changed files with 4 additions and 4 deletions
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@ -464,7 +464,7 @@ void update_mmu_cache(struct vm_area_struct *vma, unsigned long address,
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* we invalidate the TLB here, thus avoiding dcbst
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* misbehaviour.
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*/
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_tlbie(address);
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_tlbie(address, 0 /* 8xx doesn't care about PID */);
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#endif
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if (!PageReserved(page)
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&& !test_bit(PG_arch_1, &page->flags)) {
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@ -56,7 +56,7 @@ extern unsigned long total_lowmem;
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* architectures. -- Dan
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*/
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#if defined(CONFIG_8xx)
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#define flush_HPTE(X, va, pg) _tlbie(va)
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#define flush_HPTE(X, va, pg) _tlbie(va, 0 /* 8xx doesn't care about PID */)
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#define MMU_init_hw() do { } while(0)
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#define mmu_mapin_ram() (0UL)
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@ -561,7 +561,7 @@ void update_mmu_cache(struct vm_area_struct *vma, unsigned long address,
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* That means the zeroed TLB has to be invalidated
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* whenever a page miss occurs.
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*/
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_tlbie(address);
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_tlbie(address, 0 /* 8xx doesn't care about PID */);
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#endif
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if (!PageReserved(page)
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&& !test_bit(PG_arch_1, &page->flags)) {
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@ -49,7 +49,7 @@ extern unsigned int num_tlbcam_entries;
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* architectures. -- Dan
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*/
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#if defined(CONFIG_8xx)
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#define flush_HPTE(X, va, pg) _tlbie(va)
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#define flush_HPTE(X, va, pg) _tlbie(va, 0 /* 8xx doesn't care about PID */)
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#define MMU_init_hw() do { } while(0)
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#define mmu_mapin_ram() (0UL)
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