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net/mlx5: Add core dump register access HW bits

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Add Firmware core dump registers and HW definitions.

Signed-off-by: Moshe Shemesh <moshe@mellanox.com>
Signed-off-by: Eran Ben Elisha <eranbe@mellanox.com>
Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
This commit is contained in:
Moshe Shemesh 2019-05-29 22:50:24 +00:00 committed by Saeed Mahameed
parent 6cc070bdf0
commit 0b9055a112
2 changed files with 17 additions and 1 deletions
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1
include/linux/mlx5/driver.h
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@ -107,6 +107,7 @@ enum {
MLX5_REG_FPGA_CAP = 0x4022,
MLX5_REG_FPGA_CTRL = 0x4023,
MLX5_REG_FPGA_ACCESS_REG = 0x4024,
MLX5_REG_CORE_DUMP = 0x402e,
MLX5_REG_PCAP = 0x5001,
MLX5_REG_PMTU = 0x5003,
MLX5_REG_PTYS = 0x5004,

17
include/linux/mlx5/mlx5_ifc.h
View file

@ -715,7 +715,9 @@ struct mlx5_ifc_qos_cap_bits {
};
struct mlx5_ifc_debug_cap_bits {
u8 reserved_at_0[0x20];
u8 core_dump_general[0x1];
u8 core_dump_qp[0x1];
u8 reserved_at_2[0x1e];
u8 reserved_at_20[0x2];
u8 stall_detect[0x1];
@ -2531,6 +2533,7 @@ union mlx5_ifc_hca_cap_union_bits {
struct mlx5_ifc_e_switch_cap_bits e_switch_cap;
struct mlx5_ifc_vector_calc_cap_bits vector_calc_cap;
struct mlx5_ifc_qos_cap_bits qos_cap;
struct mlx5_ifc_debug_cap_bits debug_cap;
struct mlx5_ifc_fpga_cap_bits fpga_cap;
u8 reserved_at_0[0x8000];
};
@ -8546,6 +8549,18 @@ struct mlx5_ifc_qcam_reg_bits {
u8 reserved_at_1c0[0x80];
};
struct mlx5_ifc_core_dump_reg_bits {
u8 reserved_at_0[0x18];
u8 core_dump_type[0x8];
u8 reserved_at_20[0x30];
u8 vhca_id[0x10];
u8 reserved_at_60[0x8];
u8 qpn[0x18];
u8 reserved_at_80[0x180];
};
struct mlx5_ifc_pcap_reg_bits {
u8 reserved_at_0[0x8];
u8 local_port[0x8];