mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-09-04 18:09:57 +00:00
Merge ath-next from ath.git
Major changes in ath10k: * add spectral scan support for qca99x0 * add qca6164 support
This commit is contained in:
commit
0ba3ac03c1
16 changed files with 348 additions and 95 deletions
|
@ -53,6 +53,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
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.uart_pin = 7,
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.has_shifted_cc_wraparound = true,
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.otp_exe_param = 0,
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.channel_counters_freq_hz = 88000,
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.fw = {
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.dir = QCA988X_HW_2_0_FW_DIR,
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.fw = QCA988X_HW_2_0_FW_FILE,
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@ -68,6 +69,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
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.patch_load_addr = QCA6174_HW_2_1_PATCH_LOAD_ADDR,
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.uart_pin = 6,
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.otp_exe_param = 0,
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.channel_counters_freq_hz = 88000,
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.fw = {
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.dir = QCA6174_HW_2_1_FW_DIR,
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.fw = QCA6174_HW_2_1_FW_FILE,
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@ -83,6 +85,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
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.patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR,
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.uart_pin = 6,
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.otp_exe_param = 0,
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.channel_counters_freq_hz = 88000,
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.fw = {
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.dir = QCA6174_HW_3_0_FW_DIR,
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.fw = QCA6174_HW_3_0_FW_FILE,
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@ -98,6 +101,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
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.patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR,
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.uart_pin = 6,
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.otp_exe_param = 0,
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.channel_counters_freq_hz = 88000,
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.fw = {
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/* uses same binaries as hw3.0 */
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.dir = QCA6174_HW_3_0_FW_DIR,
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@ -115,6 +119,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
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.uart_pin = 7,
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.otp_exe_param = 0x00000700,
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.continuous_frag_desc = true,
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.channel_counters_freq_hz = 150000,
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.fw = {
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.dir = QCA99X0_HW_2_0_FW_DIR,
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.fw = QCA99X0_HW_2_0_FW_FILE,
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@ -231,6 +236,17 @@ static int ath10k_init_configure_target(struct ath10k *ar)
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return ret;
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}
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/* Some devices have a special sanity check that verifies the PCI
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* Device ID is written to this host interest var. It is known to be
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* required to boot QCA6164.
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*/
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ret = ath10k_bmi_write32(ar, hi_hci_uart_pwr_mgmt_params_ext,
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ar->dev_id);
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if (ret) {
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ath10k_err(ar, "failed to set pwr_mgmt_params: %d\n", ret);
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return ret;
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}
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return 0;
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}
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@ -1411,13 +1427,13 @@ int ath10k_wait_for_suspend(struct ath10k *ar, u32 suspend_opt)
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void ath10k_core_stop(struct ath10k *ar)
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{
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lockdep_assert_held(&ar->conf_mutex);
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ath10k_debug_stop(ar);
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/* try to suspend target */
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if (ar->state != ATH10K_STATE_RESTARTING &&
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ar->state != ATH10K_STATE_UTF)
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ath10k_wait_for_suspend(ar, WMI_PDEV_SUSPEND_AND_DISABLE_INTR);
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ath10k_debug_stop(ar);
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ath10k_hif_stop(ar);
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ath10k_htt_tx_free(&ar->htt);
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ath10k_htt_rx_free(&ar->htt);
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@ -554,6 +554,7 @@ struct ath10k {
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u8 mac_addr[ETH_ALEN];
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enum ath10k_hw_rev hw_rev;
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u16 dev_id;
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u32 chip_id;
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u32 target_version;
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u8 fw_version_major;
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@ -609,6 +610,8 @@ struct ath10k {
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*/
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bool continuous_frag_desc;
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u32 channel_counters_freq_hz;
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struct ath10k_hw_params_fw {
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const char *dir;
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const char *fw;
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@ -323,7 +323,7 @@ void ath10k_debug_fw_stats_process(struct ath10k *ar, struct sk_buff *skb)
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ret = ath10k_wmi_pull_fw_stats(ar, skb, &stats);
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if (ret) {
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ath10k_warn(ar, "failed to pull fw stats: %d\n", ret);
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goto unlock;
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goto free;
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}
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/* Stat data may exceed htc-wmi buffer limit. In such case firmware
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@ -386,7 +386,6 @@ void ath10k_debug_fw_stats_process(struct ath10k *ar, struct sk_buff *skb)
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ath10k_debug_fw_stats_vdevs_free(&stats.vdevs);
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ath10k_debug_fw_stats_peers_free(&stats.peers);
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unlock:
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spin_unlock_bh(&ar->data_lock);
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}
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@ -145,8 +145,10 @@ int ath10k_htc_send(struct ath10k_htc *htc,
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skb_cb->eid = eid;
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skb_cb->paddr = dma_map_single(dev, skb->data, skb->len, DMA_TO_DEVICE);
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ret = dma_mapping_error(dev, skb_cb->paddr);
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if (ret)
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if (ret) {
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ret = -EIO;
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goto err_credits;
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}
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sg_item.transfer_id = ep->eid;
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sg_item.transfer_context = skb;
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@ -442,8 +442,10 @@ int ath10k_htt_mgmt_tx(struct ath10k_htt *htt, struct sk_buff *msdu)
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skb_cb->paddr = dma_map_single(dev, msdu->data, msdu->len,
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DMA_TO_DEVICE);
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res = dma_mapping_error(dev, skb_cb->paddr);
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if (res)
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if (res) {
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res = -EIO;
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goto err_free_txdesc;
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}
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skb_put(txdesc, len);
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cmd = (struct htt_cmd *)txdesc->data;
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@ -533,8 +535,10 @@ int ath10k_htt_tx(struct ath10k_htt *htt, struct sk_buff *msdu)
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skb_cb->paddr = dma_map_single(dev, msdu->data, msdu->len,
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DMA_TO_DEVICE);
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res = dma_mapping_error(dev, skb_cb->paddr);
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if (res)
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if (res) {
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res = -EIO;
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goto err_free_txbuf;
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}
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switch (skb_cb->txmode) {
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case ATH10K_HW_TXRX_RAW:
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@ -152,6 +152,6 @@ void ath10k_hw_fill_survey_time(struct ath10k *ar, struct survey_info *survey,
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cc -= cc_prev - cc_fix;
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rcc -= rcc_prev;
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survey->time = CCNT_TO_MSEC(cc);
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survey->time_busy = CCNT_TO_MSEC(rcc);
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survey->time = CCNT_TO_MSEC(ar, cc);
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survey->time_busy = CCNT_TO_MSEC(ar, rcc);
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}
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@ -552,8 +552,7 @@ enum ath10k_hw_rate_cck {
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#define SCRATCH_3_ADDRESS ar->regs->scratch_3_address
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#define CPU_INTR_ADDRESS 0x0010
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/* Cycle counters are running at 88MHz */
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#define CCNT_TO_MSEC(x) ((x) / 88000)
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#define CCNT_TO_MSEC(ar, x) ((x) / ar->hw_params.channel_counters_freq_hz)
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/* Firmware indications to the Host via SCRATCH_3 register. */
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#define FW_INDICATOR_ADDRESS ar->regs->fw_indicator_address
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@ -247,6 +247,10 @@ static int ath10k_install_peer_wep_keys(struct ath10k_vif *arvif,
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lockdep_assert_held(&ar->conf_mutex);
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if (WARN_ON(arvif->vif->type != NL80211_IFTYPE_AP &&
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arvif->vif->type != NL80211_IFTYPE_ADHOC))
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return -EINVAL;
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spin_lock_bh(&ar->data_lock);
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peer = ath10k_peer_find(ar, arvif->vdev_id, addr);
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spin_unlock_bh(&ar->data_lock);
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@ -258,21 +262,34 @@ static int ath10k_install_peer_wep_keys(struct ath10k_vif *arvif,
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if (arvif->wep_keys[i] == NULL)
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continue;
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flags = 0;
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flags |= WMI_KEY_PAIRWISE;
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switch (arvif->vif->type) {
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case NL80211_IFTYPE_AP:
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flags = WMI_KEY_PAIRWISE;
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ret = ath10k_install_key(arvif, arvif->wep_keys[i], SET_KEY,
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addr, flags);
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if (ret < 0)
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return ret;
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if (arvif->def_wep_key_idx == i)
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flags |= WMI_KEY_TX_USAGE;
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flags = 0;
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flags |= WMI_KEY_GROUP;
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ret = ath10k_install_key(arvif, arvif->wep_keys[i],
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SET_KEY, addr, flags);
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if (ret < 0)
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return ret;
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break;
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case NL80211_IFTYPE_ADHOC:
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ret = ath10k_install_key(arvif, arvif->wep_keys[i],
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SET_KEY, addr,
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WMI_KEY_PAIRWISE);
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if (ret < 0)
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return ret;
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ret = ath10k_install_key(arvif, arvif->wep_keys[i], SET_KEY,
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addr, flags);
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if (ret < 0)
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return ret;
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ret = ath10k_install_key(arvif, arvif->wep_keys[i],
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SET_KEY, addr, WMI_KEY_GROUP);
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if (ret < 0)
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return ret;
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break;
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default:
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WARN_ON(1);
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return -EINVAL;
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}
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spin_lock_bh(&ar->data_lock);
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peer->keys[i] = arvif->wep_keys[i];
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@ -287,6 +304,9 @@ static int ath10k_install_peer_wep_keys(struct ath10k_vif *arvif,
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*
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* FIXME: Revisit. Perhaps this can be done in a less hacky way.
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*/
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if (arvif->vif->type != NL80211_IFTYPE_ADHOC)
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return 0;
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if (arvif->def_wep_key_idx == -1)
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return 0;
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@ -2999,6 +3019,8 @@ void ath10k_mac_tx_unlock(struct ath10k *ar, int reason)
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IEEE80211_IFACE_ITER_RESUME_ALL,
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ath10k_mac_tx_unlock_iter,
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ar);
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ieee80211_wake_queue(ar->hw, ar->hw->offchannel_tx_hw_queue);
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}
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void ath10k_mac_vif_tx_lock(struct ath10k_vif *arvif, int reason)
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@ -4122,7 +4144,8 @@ static int ath10k_add_interface(struct ieee80211_hw *hw,
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if (ar->num_peers >= ar->max_num_peers) {
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ath10k_warn(ar, "refusing vdev creation due to insufficient peer entry resources in firmware\n");
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return -ENOBUFS;
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ret = -ENOBUFS;
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goto err;
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}
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if (ar->free_vdev_map == 0) {
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@ -4340,6 +4363,11 @@ static int ath10k_add_interface(struct ieee80211_hw *hw,
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}
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}
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spin_lock_bh(&ar->htt.tx_lock);
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if (!ar->tx_paused)
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ieee80211_wake_queue(ar->hw, arvif->vdev_id);
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spin_unlock_bh(&ar->htt.tx_lock);
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mutex_unlock(&ar->conf_mutex);
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return 0;
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|
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|
|
|
@ -58,11 +58,13 @@ MODULE_PARM_DESC(reset_mode, "0: auto, 1: warm only (default: 0)");
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#define ATH10K_PCI_NUM_WARM_RESET_ATTEMPTS 3
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|
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#define QCA988X_2_0_DEVICE_ID (0x003c)
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#define QCA6164_2_1_DEVICE_ID (0x0041)
|
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#define QCA6174_2_1_DEVICE_ID (0x003e)
|
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#define QCA99X0_2_0_DEVICE_ID (0x0040)
|
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|
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static const struct pci_device_id ath10k_pci_id_table[] = {
|
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{ PCI_VDEVICE(ATHEROS, QCA988X_2_0_DEVICE_ID) }, /* PCI-E QCA988X V2 */
|
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{ PCI_VDEVICE(ATHEROS, QCA6164_2_1_DEVICE_ID) }, /* PCI-E QCA6164 V2.1 */
|
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{ PCI_VDEVICE(ATHEROS, QCA6174_2_1_DEVICE_ID) }, /* PCI-E QCA6174 V2.1 */
|
||||
{ PCI_VDEVICE(ATHEROS, QCA99X0_2_0_DEVICE_ID) }, /* PCI-E QCA99X0 V2 */
|
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{0}
|
||||
|
@ -74,11 +76,19 @@ static const struct ath10k_pci_supp_chip ath10k_pci_supp_chips[] = {
|
|||
* because of that.
|
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*/
|
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{ QCA988X_2_0_DEVICE_ID, QCA988X_HW_2_0_CHIP_ID_REV },
|
||||
|
||||
{ QCA6164_2_1_DEVICE_ID, QCA6174_HW_2_1_CHIP_ID_REV },
|
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{ QCA6164_2_1_DEVICE_ID, QCA6174_HW_2_2_CHIP_ID_REV },
|
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{ QCA6164_2_1_DEVICE_ID, QCA6174_HW_3_0_CHIP_ID_REV },
|
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{ QCA6164_2_1_DEVICE_ID, QCA6174_HW_3_1_CHIP_ID_REV },
|
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{ QCA6164_2_1_DEVICE_ID, QCA6174_HW_3_2_CHIP_ID_REV },
|
||||
|
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{ QCA6174_2_1_DEVICE_ID, QCA6174_HW_2_1_CHIP_ID_REV },
|
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{ QCA6174_2_1_DEVICE_ID, QCA6174_HW_2_2_CHIP_ID_REV },
|
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{ QCA6174_2_1_DEVICE_ID, QCA6174_HW_3_0_CHIP_ID_REV },
|
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{ QCA6174_2_1_DEVICE_ID, QCA6174_HW_3_1_CHIP_ID_REV },
|
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{ QCA6174_2_1_DEVICE_ID, QCA6174_HW_3_2_CHIP_ID_REV },
|
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|
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{ QCA99X0_2_0_DEVICE_ID, QCA99X0_HW_2_0_CHIP_ID_REV },
|
||||
};
|
||||
|
||||
|
@ -1667,8 +1677,10 @@ static int ath10k_pci_hif_exchange_bmi_msg(struct ath10k *ar,
|
|||
|
||||
req_paddr = dma_map_single(ar->dev, treq, req_len, DMA_TO_DEVICE);
|
||||
ret = dma_mapping_error(ar->dev, req_paddr);
|
||||
if (ret)
|
||||
if (ret) {
|
||||
ret = -EIO;
|
||||
goto err_dma;
|
||||
}
|
||||
|
||||
if (resp && resp_len) {
|
||||
tresp = kzalloc(*resp_len, GFP_KERNEL);
|
||||
|
@ -1680,8 +1692,10 @@ static int ath10k_pci_hif_exchange_bmi_msg(struct ath10k *ar,
|
|||
resp_paddr = dma_map_single(ar->dev, tresp, *resp_len,
|
||||
DMA_FROM_DEVICE);
|
||||
ret = dma_mapping_error(ar->dev, resp_paddr);
|
||||
if (ret)
|
||||
if (ret) {
|
||||
ret = EIO;
|
||||
goto err_req;
|
||||
}
|
||||
|
||||
xfer.wait_for_resp = true;
|
||||
xfer.resp_len = 0;
|
||||
|
@ -1810,6 +1824,7 @@ static int ath10k_pci_get_num_banks(struct ath10k *ar)
|
|||
case QCA988X_2_0_DEVICE_ID:
|
||||
case QCA99X0_2_0_DEVICE_ID:
|
||||
return 1;
|
||||
case QCA6164_2_1_DEVICE_ID:
|
||||
case QCA6174_2_1_DEVICE_ID:
|
||||
switch (MS(ar->chip_id, SOC_CHIP_ID_REV)) {
|
||||
case QCA6174_HW_1_0_CHIP_ID_REV:
|
||||
|
@ -2898,6 +2913,7 @@ static int ath10k_pci_probe(struct pci_dev *pdev,
|
|||
case QCA988X_2_0_DEVICE_ID:
|
||||
hw_rev = ATH10K_HW_QCA988X;
|
||||
break;
|
||||
case QCA6164_2_1_DEVICE_ID:
|
||||
case QCA6174_2_1_DEVICE_ID:
|
||||
hw_rev = ATH10K_HW_QCA6174;
|
||||
break;
|
||||
|
@ -2922,6 +2938,7 @@ static int ath10k_pci_probe(struct pci_dev *pdev,
|
|||
ar_pci->pdev = pdev;
|
||||
ar_pci->dev = &pdev->dev;
|
||||
ar_pci->ar = ar;
|
||||
ar->dev_id = pci_dev->device;
|
||||
|
||||
if (pdev->subsystem_vendor || pdev->subsystem_device)
|
||||
scnprintf(ar->spec_board_id, sizeof(ar->spec_board_id),
|
||||
|
|
|
@ -57,7 +57,7 @@ static uint8_t get_max_exp(s8 max_index, u16 max_magnitude, size_t bin_len,
|
|||
}
|
||||
|
||||
int ath10k_spectral_process_fft(struct ath10k *ar,
|
||||
const struct wmi_phyerr *phyerr,
|
||||
struct wmi_phyerr_ev_arg *phyerr,
|
||||
const struct phyerr_fft_report *fftr,
|
||||
size_t bin_len, u64 tsf)
|
||||
{
|
||||
|
@ -73,6 +73,15 @@ int ath10k_spectral_process_fft(struct ath10k *ar,
|
|||
if (bin_len < 64 || bin_len > SPECTRAL_ATH10K_MAX_NUM_BINS)
|
||||
return -EINVAL;
|
||||
|
||||
/* qca99x0 reports bin size as 68 bytes (64 bytes + 4 bytes) in
|
||||
* report mode 2. First 64 bytes carries inband tones (-32 to +31)
|
||||
* and last 4 byte carries band edge detection data (+32) mainly
|
||||
* used in radar detection purpose. Strip last 4 byte to make bin
|
||||
* size is valid one.
|
||||
*/
|
||||
if (bin_len == 68)
|
||||
bin_len -= 4;
|
||||
|
||||
reg0 = __le32_to_cpu(fftr->reg0);
|
||||
reg1 = __le32_to_cpu(fftr->reg1);
|
||||
|
||||
|
@ -118,15 +127,14 @@ int ath10k_spectral_process_fft(struct ath10k *ar,
|
|||
fft_sample->total_gain_db = __cpu_to_be16(total_gain_db);
|
||||
fft_sample->base_pwr_db = __cpu_to_be16(base_pwr_db);
|
||||
|
||||
freq1 = __le16_to_cpu(phyerr->freq1);
|
||||
freq2 = __le16_to_cpu(phyerr->freq2);
|
||||
freq1 = phyerr->freq1;
|
||||
freq2 = phyerr->freq2;
|
||||
fft_sample->freq1 = __cpu_to_be16(freq1);
|
||||
fft_sample->freq2 = __cpu_to_be16(freq2);
|
||||
|
||||
chain_idx = MS(reg0, SEARCH_FFT_REPORT_REG0_FFT_CHN_IDX);
|
||||
|
||||
fft_sample->noise = __cpu_to_be16(
|
||||
__le16_to_cpu(phyerr->nf_chains[chain_idx]));
|
||||
fft_sample->noise = __cpu_to_be16(phyerr->nf_chains[chain_idx]);
|
||||
|
||||
bins = (u8 *)fftr;
|
||||
bins += sizeof(*fftr);
|
||||
|
|
|
@ -47,7 +47,7 @@ enum ath10k_spectral_mode {
|
|||
#ifdef CONFIG_ATH10K_DEBUGFS
|
||||
|
||||
int ath10k_spectral_process_fft(struct ath10k *ar,
|
||||
const struct wmi_phyerr *phyerr,
|
||||
struct wmi_phyerr_ev_arg *phyerr,
|
||||
const struct phyerr_fft_report *fftr,
|
||||
size_t bin_len, u64 tsf);
|
||||
int ath10k_spectral_start(struct ath10k *ar);
|
||||
|
@ -59,7 +59,7 @@ void ath10k_spectral_destroy(struct ath10k *ar);
|
|||
|
||||
static inline int
|
||||
ath10k_spectral_process_fft(struct ath10k *ar,
|
||||
const struct wmi_phyerr *phyerr,
|
||||
struct wmi_phyerr_ev_arg *phyerr,
|
||||
const struct phyerr_fft_report *fftr,
|
||||
size_t bin_len, u64 tsf)
|
||||
{
|
||||
|
|
|
@ -37,8 +37,10 @@ struct wmi_ops {
|
|||
struct wmi_peer_kick_ev_arg *arg);
|
||||
int (*pull_swba)(struct ath10k *ar, struct sk_buff *skb,
|
||||
struct wmi_swba_ev_arg *arg);
|
||||
int (*pull_phyerr)(struct ath10k *ar, struct sk_buff *skb,
|
||||
struct wmi_phyerr_ev_arg *arg);
|
||||
int (*pull_phyerr_hdr)(struct ath10k *ar, struct sk_buff *skb,
|
||||
struct wmi_phyerr_hdr_arg *arg);
|
||||
int (*pull_phyerr)(struct ath10k *ar, const void *phyerr_buf,
|
||||
int left_len, struct wmi_phyerr_ev_arg *arg);
|
||||
int (*pull_svc_rdy)(struct ath10k *ar, struct sk_buff *skb,
|
||||
struct wmi_svc_rdy_ev_arg *arg);
|
||||
int (*pull_rdy)(struct ath10k *ar, struct sk_buff *skb,
|
||||
|
@ -261,13 +263,23 @@ ath10k_wmi_pull_swba(struct ath10k *ar, struct sk_buff *skb,
|
|||
}
|
||||
|
||||
static inline int
|
||||
ath10k_wmi_pull_phyerr(struct ath10k *ar, struct sk_buff *skb,
|
||||
struct wmi_phyerr_ev_arg *arg)
|
||||
ath10k_wmi_pull_phyerr_hdr(struct ath10k *ar, struct sk_buff *skb,
|
||||
struct wmi_phyerr_hdr_arg *arg)
|
||||
{
|
||||
if (!ar->wmi.ops->pull_phyerr_hdr)
|
||||
return -EOPNOTSUPP;
|
||||
|
||||
return ar->wmi.ops->pull_phyerr_hdr(ar, skb, arg);
|
||||
}
|
||||
|
||||
static inline int
|
||||
ath10k_wmi_pull_phyerr(struct ath10k *ar, const void *phyerr_buf,
|
||||
int left_len, struct wmi_phyerr_ev_arg *arg)
|
||||
{
|
||||
if (!ar->wmi.ops->pull_phyerr)
|
||||
return -EOPNOTSUPP;
|
||||
|
||||
return ar->wmi.ops->pull_phyerr(ar, skb, arg);
|
||||
return ar->wmi.ops->pull_phyerr(ar, phyerr_buf, left_len, arg);
|
||||
}
|
||||
|
||||
static inline int
|
||||
|
|
|
@ -838,9 +838,9 @@ static int ath10k_wmi_tlv_op_pull_swba_ev(struct ath10k *ar,
|
|||
return 0;
|
||||
}
|
||||
|
||||
static int ath10k_wmi_tlv_op_pull_phyerr_ev(struct ath10k *ar,
|
||||
struct sk_buff *skb,
|
||||
struct wmi_phyerr_ev_arg *arg)
|
||||
static int ath10k_wmi_tlv_op_pull_phyerr_ev_hdr(struct ath10k *ar,
|
||||
struct sk_buff *skb,
|
||||
struct wmi_phyerr_hdr_arg *arg)
|
||||
{
|
||||
const void **tb;
|
||||
const struct wmi_tlv_phyerr_ev *ev;
|
||||
|
@ -862,10 +862,10 @@ static int ath10k_wmi_tlv_op_pull_phyerr_ev(struct ath10k *ar,
|
|||
return -EPROTO;
|
||||
}
|
||||
|
||||
arg->num_phyerrs = ev->num_phyerrs;
|
||||
arg->tsf_l32 = ev->tsf_l32;
|
||||
arg->tsf_u32 = ev->tsf_u32;
|
||||
arg->buf_len = ev->buf_len;
|
||||
arg->num_phyerrs = __le32_to_cpu(ev->num_phyerrs);
|
||||
arg->tsf_l32 = __le32_to_cpu(ev->tsf_l32);
|
||||
arg->tsf_u32 = __le32_to_cpu(ev->tsf_u32);
|
||||
arg->buf_len = __le32_to_cpu(ev->buf_len);
|
||||
arg->phyerrs = phyerrs;
|
||||
|
||||
kfree(tb);
|
||||
|
@ -3407,7 +3407,8 @@ static const struct wmi_ops wmi_tlv_ops = {
|
|||
.pull_vdev_start = ath10k_wmi_tlv_op_pull_vdev_start_ev,
|
||||
.pull_peer_kick = ath10k_wmi_tlv_op_pull_peer_kick_ev,
|
||||
.pull_swba = ath10k_wmi_tlv_op_pull_swba_ev,
|
||||
.pull_phyerr = ath10k_wmi_tlv_op_pull_phyerr_ev,
|
||||
.pull_phyerr_hdr = ath10k_wmi_tlv_op_pull_phyerr_ev_hdr,
|
||||
.pull_phyerr = ath10k_wmi_op_pull_phyerr_ev,
|
||||
.pull_svc_rdy = ath10k_wmi_tlv_op_pull_svc_rdy_ev,
|
||||
.pull_rdy = ath10k_wmi_tlv_op_pull_rdy_ev,
|
||||
.pull_fw_stats = ath10k_wmi_tlv_op_pull_fw_stats,
|
||||
|
|
|
@ -2412,8 +2412,10 @@ void ath10k_wmi_event_chan_info(struct ath10k *ar, struct sk_buff *skb)
|
|||
ar->ch_info_can_report_survey = true;
|
||||
}
|
||||
|
||||
ar->survey_last_rx_clear_count = rx_clear_count;
|
||||
ar->survey_last_cycle_count = cycle_count;
|
||||
if (!(cmd_flags & WMI_CHAN_INFO_FLAG_PRE_COMPLETE)) {
|
||||
ar->survey_last_rx_clear_count = rx_clear_count;
|
||||
ar->survey_last_cycle_count = cycle_count;
|
||||
}
|
||||
|
||||
exit:
|
||||
spin_unlock_bh(&ar->data_lock);
|
||||
|
@ -3236,6 +3238,7 @@ void ath10k_wmi_event_host_swba(struct ath10k *ar, struct sk_buff *skb)
|
|||
ath10k_warn(ar, "failed to map beacon: %d\n",
|
||||
ret);
|
||||
dev_kfree_skb_any(bcn);
|
||||
ret = -EIO;
|
||||
goto skip;
|
||||
}
|
||||
|
||||
|
@ -3269,7 +3272,7 @@ void ath10k_wmi_event_tbttoffset_update(struct ath10k *ar, struct sk_buff *skb)
|
|||
}
|
||||
|
||||
static void ath10k_dfs_radar_report(struct ath10k *ar,
|
||||
const struct wmi_phyerr *phyerr,
|
||||
struct wmi_phyerr_ev_arg *phyerr,
|
||||
const struct phyerr_radar_report *rr,
|
||||
u64 tsf)
|
||||
{
|
||||
|
@ -3313,7 +3316,7 @@ static void ath10k_dfs_radar_report(struct ath10k *ar,
|
|||
}
|
||||
|
||||
/* report event to DFS pattern detector */
|
||||
tsf32l = __le32_to_cpu(phyerr->tsf_timestamp);
|
||||
tsf32l = phyerr->tsf_timestamp;
|
||||
tsf64 = tsf & (~0xFFFFFFFFULL);
|
||||
tsf64 |= tsf32l;
|
||||
|
||||
|
@ -3358,7 +3361,7 @@ static void ath10k_dfs_radar_report(struct ath10k *ar,
|
|||
}
|
||||
|
||||
static int ath10k_dfs_fft_report(struct ath10k *ar,
|
||||
const struct wmi_phyerr *phyerr,
|
||||
struct wmi_phyerr_ev_arg *phyerr,
|
||||
const struct phyerr_fft_report *fftr,
|
||||
u64 tsf)
|
||||
{
|
||||
|
@ -3396,7 +3399,7 @@ static int ath10k_dfs_fft_report(struct ath10k *ar,
|
|||
}
|
||||
|
||||
void ath10k_wmi_event_dfs(struct ath10k *ar,
|
||||
const struct wmi_phyerr *phyerr,
|
||||
struct wmi_phyerr_ev_arg *phyerr,
|
||||
u64 tsf)
|
||||
{
|
||||
int buf_len, tlv_len, res, i = 0;
|
||||
|
@ -3405,11 +3408,11 @@ void ath10k_wmi_event_dfs(struct ath10k *ar,
|
|||
const struct phyerr_fft_report *fftr;
|
||||
const u8 *tlv_buf;
|
||||
|
||||
buf_len = __le32_to_cpu(phyerr->buf_len);
|
||||
buf_len = phyerr->buf_len;
|
||||
ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
|
||||
"wmi event dfs err_code %d rssi %d tsfl 0x%X tsf64 0x%llX len %d\n",
|
||||
phyerr->phy_err_code, phyerr->rssi_combined,
|
||||
__le32_to_cpu(phyerr->tsf_timestamp), tsf, buf_len);
|
||||
phyerr->tsf_timestamp, tsf, buf_len);
|
||||
|
||||
/* Skip event if DFS disabled */
|
||||
if (!config_enabled(CONFIG_ATH10K_DFS_CERTIFIED))
|
||||
|
@ -3461,7 +3464,7 @@ void ath10k_wmi_event_dfs(struct ath10k *ar,
|
|||
}
|
||||
|
||||
void ath10k_wmi_event_spectral_scan(struct ath10k *ar,
|
||||
const struct wmi_phyerr *phyerr,
|
||||
struct wmi_phyerr_ev_arg *phyerr,
|
||||
u64 tsf)
|
||||
{
|
||||
int buf_len, tlv_len, res, i = 0;
|
||||
|
@ -3470,7 +3473,7 @@ void ath10k_wmi_event_spectral_scan(struct ath10k *ar,
|
|||
const struct phyerr_fft_report *fftr;
|
||||
size_t fftr_len;
|
||||
|
||||
buf_len = __le32_to_cpu(phyerr->buf_len);
|
||||
buf_len = phyerr->buf_len;
|
||||
|
||||
while (i < buf_len) {
|
||||
if (i + sizeof(*tlv) > buf_len) {
|
||||
|
@ -3514,65 +3517,169 @@ void ath10k_wmi_event_spectral_scan(struct ath10k *ar,
|
|||
}
|
||||
}
|
||||
|
||||
static int ath10k_wmi_op_pull_phyerr_ev(struct ath10k *ar, struct sk_buff *skb,
|
||||
struct wmi_phyerr_ev_arg *arg)
|
||||
static int ath10k_wmi_op_pull_phyerr_ev_hdr(struct ath10k *ar,
|
||||
struct sk_buff *skb,
|
||||
struct wmi_phyerr_hdr_arg *arg)
|
||||
{
|
||||
struct wmi_phyerr_event *ev = (void *)skb->data;
|
||||
|
||||
if (skb->len < sizeof(*ev))
|
||||
return -EPROTO;
|
||||
|
||||
arg->num_phyerrs = ev->num_phyerrs;
|
||||
arg->tsf_l32 = ev->tsf_l32;
|
||||
arg->tsf_u32 = ev->tsf_u32;
|
||||
arg->buf_len = __cpu_to_le32(skb->len - sizeof(*ev));
|
||||
arg->num_phyerrs = __le32_to_cpu(ev->num_phyerrs);
|
||||
arg->tsf_l32 = __le32_to_cpu(ev->tsf_l32);
|
||||
arg->tsf_u32 = __le32_to_cpu(ev->tsf_u32);
|
||||
arg->buf_len = skb->len - sizeof(*ev);
|
||||
arg->phyerrs = ev->phyerrs;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int ath10k_wmi_10_4_op_pull_phyerr_ev_hdr(struct ath10k *ar,
|
||||
struct sk_buff *skb,
|
||||
struct wmi_phyerr_hdr_arg *arg)
|
||||
{
|
||||
struct wmi_10_4_phyerr_event *ev = (void *)skb->data;
|
||||
|
||||
if (skb->len < sizeof(*ev))
|
||||
return -EPROTO;
|
||||
|
||||
/* 10.4 firmware always reports only one phyerr */
|
||||
arg->num_phyerrs = 1;
|
||||
|
||||
arg->tsf_l32 = __le32_to_cpu(ev->tsf_l32);
|
||||
arg->tsf_u32 = __le32_to_cpu(ev->tsf_u32);
|
||||
arg->buf_len = skb->len;
|
||||
arg->phyerrs = skb->data;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
int ath10k_wmi_op_pull_phyerr_ev(struct ath10k *ar,
|
||||
const void *phyerr_buf,
|
||||
int left_len,
|
||||
struct wmi_phyerr_ev_arg *arg)
|
||||
{
|
||||
const struct wmi_phyerr *phyerr = phyerr_buf;
|
||||
int i;
|
||||
|
||||
if (left_len < sizeof(*phyerr)) {
|
||||
ath10k_warn(ar, "wrong phyerr event head len %d (need: >=%zd)\n",
|
||||
left_len, sizeof(*phyerr));
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
arg->tsf_timestamp = __le32_to_cpu(phyerr->tsf_timestamp);
|
||||
arg->freq1 = __le16_to_cpu(phyerr->freq1);
|
||||
arg->freq2 = __le16_to_cpu(phyerr->freq2);
|
||||
arg->rssi_combined = phyerr->rssi_combined;
|
||||
arg->chan_width_mhz = phyerr->chan_width_mhz;
|
||||
arg->buf_len = __le32_to_cpu(phyerr->buf_len);
|
||||
arg->buf = phyerr->buf;
|
||||
arg->hdr_len = sizeof(*phyerr);
|
||||
|
||||
for (i = 0; i < 4; i++)
|
||||
arg->nf_chains[i] = __le16_to_cpu(phyerr->nf_chains[i]);
|
||||
|
||||
switch (phyerr->phy_err_code) {
|
||||
case PHY_ERROR_GEN_SPECTRAL_SCAN:
|
||||
arg->phy_err_code = PHY_ERROR_SPECTRAL_SCAN;
|
||||
break;
|
||||
case PHY_ERROR_GEN_FALSE_RADAR_EXT:
|
||||
arg->phy_err_code = PHY_ERROR_FALSE_RADAR_EXT;
|
||||
break;
|
||||
case PHY_ERROR_GEN_RADAR:
|
||||
arg->phy_err_code = PHY_ERROR_RADAR;
|
||||
break;
|
||||
default:
|
||||
arg->phy_err_code = PHY_ERROR_UNKNOWN;
|
||||
break;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int ath10k_wmi_10_4_op_pull_phyerr_ev(struct ath10k *ar,
|
||||
const void *phyerr_buf,
|
||||
int left_len,
|
||||
struct wmi_phyerr_ev_arg *arg)
|
||||
{
|
||||
const struct wmi_10_4_phyerr_event *phyerr = phyerr_buf;
|
||||
u32 phy_err_mask;
|
||||
int i;
|
||||
|
||||
if (left_len < sizeof(*phyerr)) {
|
||||
ath10k_warn(ar, "wrong phyerr event head len %d (need: >=%zd)\n",
|
||||
left_len, sizeof(*phyerr));
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
arg->tsf_timestamp = __le32_to_cpu(phyerr->tsf_timestamp);
|
||||
arg->freq1 = __le16_to_cpu(phyerr->freq1);
|
||||
arg->freq2 = __le16_to_cpu(phyerr->freq2);
|
||||
arg->rssi_combined = phyerr->rssi_combined;
|
||||
arg->chan_width_mhz = phyerr->chan_width_mhz;
|
||||
arg->buf_len = __le32_to_cpu(phyerr->buf_len);
|
||||
arg->buf = phyerr->buf;
|
||||
arg->hdr_len = sizeof(*phyerr);
|
||||
|
||||
for (i = 0; i < 4; i++)
|
||||
arg->nf_chains[i] = __le16_to_cpu(phyerr->nf_chains[i]);
|
||||
|
||||
phy_err_mask = __le32_to_cpu(phyerr->phy_err_mask[0]);
|
||||
|
||||
if (phy_err_mask & PHY_ERROR_10_4_SPECTRAL_SCAN_MASK)
|
||||
arg->phy_err_code = PHY_ERROR_SPECTRAL_SCAN;
|
||||
else if (phy_err_mask & PHY_ERROR_10_4_RADAR_MASK)
|
||||
arg->phy_err_code = PHY_ERROR_RADAR;
|
||||
else
|
||||
arg->phy_err_code = PHY_ERROR_UNKNOWN;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
void ath10k_wmi_event_phyerr(struct ath10k *ar, struct sk_buff *skb)
|
||||
{
|
||||
struct wmi_phyerr_ev_arg arg = {};
|
||||
const struct wmi_phyerr *phyerr;
|
||||
struct wmi_phyerr_hdr_arg hdr_arg = {};
|
||||
struct wmi_phyerr_ev_arg phyerr_arg = {};
|
||||
const void *phyerr;
|
||||
u32 count, i, buf_len, phy_err_code;
|
||||
u64 tsf;
|
||||
int left_len, ret;
|
||||
|
||||
ATH10K_DFS_STAT_INC(ar, phy_errors);
|
||||
|
||||
ret = ath10k_wmi_pull_phyerr(ar, skb, &arg);
|
||||
ret = ath10k_wmi_pull_phyerr_hdr(ar, skb, &hdr_arg);
|
||||
if (ret) {
|
||||
ath10k_warn(ar, "failed to parse phyerr event: %d\n", ret);
|
||||
ath10k_warn(ar, "failed to parse phyerr event hdr: %d\n", ret);
|
||||
return;
|
||||
}
|
||||
|
||||
left_len = __le32_to_cpu(arg.buf_len);
|
||||
|
||||
/* Check number of included events */
|
||||
count = __le32_to_cpu(arg.num_phyerrs);
|
||||
count = hdr_arg.num_phyerrs;
|
||||
|
||||
tsf = __le32_to_cpu(arg.tsf_u32);
|
||||
left_len = hdr_arg.buf_len;
|
||||
|
||||
tsf = hdr_arg.tsf_u32;
|
||||
tsf <<= 32;
|
||||
tsf |= __le32_to_cpu(arg.tsf_l32);
|
||||
tsf |= hdr_arg.tsf_l32;
|
||||
|
||||
ath10k_dbg(ar, ATH10K_DBG_WMI,
|
||||
"wmi event phyerr count %d tsf64 0x%llX\n",
|
||||
count, tsf);
|
||||
|
||||
phyerr = arg.phyerrs;
|
||||
phyerr = hdr_arg.phyerrs;
|
||||
for (i = 0; i < count; i++) {
|
||||
/* Check if we can read event header */
|
||||
if (left_len < sizeof(*phyerr)) {
|
||||
ath10k_warn(ar, "single event (%d) wrong head len\n",
|
||||
ret = ath10k_wmi_pull_phyerr(ar, phyerr, left_len, &phyerr_arg);
|
||||
if (ret) {
|
||||
ath10k_warn(ar, "failed to parse phyerr event (%d)\n",
|
||||
i);
|
||||
return;
|
||||
}
|
||||
|
||||
left_len -= sizeof(*phyerr);
|
||||
|
||||
buf_len = __le32_to_cpu(phyerr->buf_len);
|
||||
phy_err_code = phyerr->phy_err_code;
|
||||
left_len -= phyerr_arg.hdr_len;
|
||||
buf_len = phyerr_arg.buf_len;
|
||||
phy_err_code = phyerr_arg.phy_err_code;
|
||||
|
||||
if (left_len < buf_len) {
|
||||
ath10k_warn(ar, "single event (%d) wrong buf len\n", i);
|
||||
|
@ -3583,20 +3690,20 @@ void ath10k_wmi_event_phyerr(struct ath10k *ar, struct sk_buff *skb)
|
|||
|
||||
switch (phy_err_code) {
|
||||
case PHY_ERROR_RADAR:
|
||||
ath10k_wmi_event_dfs(ar, phyerr, tsf);
|
||||
ath10k_wmi_event_dfs(ar, &phyerr_arg, tsf);
|
||||
break;
|
||||
case PHY_ERROR_SPECTRAL_SCAN:
|
||||
ath10k_wmi_event_spectral_scan(ar, phyerr, tsf);
|
||||
ath10k_wmi_event_spectral_scan(ar, &phyerr_arg, tsf);
|
||||
break;
|
||||
case PHY_ERROR_FALSE_RADAR_EXT:
|
||||
ath10k_wmi_event_dfs(ar, phyerr, tsf);
|
||||
ath10k_wmi_event_spectral_scan(ar, phyerr, tsf);
|
||||
ath10k_wmi_event_dfs(ar, &phyerr_arg, tsf);
|
||||
ath10k_wmi_event_spectral_scan(ar, &phyerr_arg, tsf);
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
phyerr = (void *)phyerr + sizeof(*phyerr) + buf_len;
|
||||
phyerr = phyerr + phyerr_arg.hdr_len + buf_len;
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -4488,6 +4595,9 @@ static void ath10k_wmi_10_4_op_rx(struct ath10k *ar, struct sk_buff *skb)
|
|||
case WMI_10_4_CHAN_INFO_EVENTID:
|
||||
ath10k_wmi_event_chan_info(ar, skb);
|
||||
break;
|
||||
case WMI_10_4_PHYERR_EVENTID:
|
||||
ath10k_wmi_event_phyerr(ar, skb);
|
||||
break;
|
||||
case WMI_10_4_READY_EVENTID:
|
||||
ath10k_wmi_event_ready(ar, skb);
|
||||
break;
|
||||
|
@ -6195,6 +6305,7 @@ static const struct wmi_ops wmi_ops = {
|
|||
.pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev,
|
||||
.pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev,
|
||||
.pull_swba = ath10k_wmi_op_pull_swba_ev,
|
||||
.pull_phyerr_hdr = ath10k_wmi_op_pull_phyerr_ev_hdr,
|
||||
.pull_phyerr = ath10k_wmi_op_pull_phyerr_ev,
|
||||
.pull_svc_rdy = ath10k_wmi_main_op_pull_svc_rdy_ev,
|
||||
.pull_rdy = ath10k_wmi_op_pull_rdy_ev,
|
||||
|
@ -6266,6 +6377,7 @@ static const struct wmi_ops wmi_10_1_ops = {
|
|||
.pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev,
|
||||
.pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev,
|
||||
.pull_swba = ath10k_wmi_op_pull_swba_ev,
|
||||
.pull_phyerr_hdr = ath10k_wmi_op_pull_phyerr_ev_hdr,
|
||||
.pull_phyerr = ath10k_wmi_op_pull_phyerr_ev,
|
||||
.pull_rdy = ath10k_wmi_op_pull_rdy_ev,
|
||||
.pull_roam_ev = ath10k_wmi_op_pull_roam_ev,
|
||||
|
@ -6331,6 +6443,7 @@ static const struct wmi_ops wmi_10_2_ops = {
|
|||
.pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev,
|
||||
.pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev,
|
||||
.pull_swba = ath10k_wmi_op_pull_swba_ev,
|
||||
.pull_phyerr_hdr = ath10k_wmi_op_pull_phyerr_ev_hdr,
|
||||
.pull_phyerr = ath10k_wmi_op_pull_phyerr_ev,
|
||||
.pull_rdy = ath10k_wmi_op_pull_rdy_ev,
|
||||
.pull_roam_ev = ath10k_wmi_op_pull_roam_ev,
|
||||
|
@ -6392,6 +6505,7 @@ static const struct wmi_ops wmi_10_2_4_ops = {
|
|||
.pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev,
|
||||
.pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev,
|
||||
.pull_swba = ath10k_wmi_op_pull_swba_ev,
|
||||
.pull_phyerr_hdr = ath10k_wmi_op_pull_phyerr_ev_hdr,
|
||||
.pull_phyerr = ath10k_wmi_op_pull_phyerr_ev,
|
||||
.pull_rdy = ath10k_wmi_op_pull_rdy_ev,
|
||||
.pull_roam_ev = ath10k_wmi_op_pull_roam_ev,
|
||||
|
@ -6447,6 +6561,8 @@ static const struct wmi_ops wmi_10_4_ops = {
|
|||
.pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev,
|
||||
.pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev,
|
||||
.pull_swba = ath10k_wmi_10_4_op_pull_swba_ev,
|
||||
.pull_phyerr_hdr = ath10k_wmi_10_4_op_pull_phyerr_ev_hdr,
|
||||
.pull_phyerr = ath10k_wmi_10_4_op_pull_phyerr_ev,
|
||||
.pull_svc_rdy = ath10k_wmi_main_op_pull_svc_rdy_ev,
|
||||
.pull_rdy = ath10k_wmi_op_pull_rdy_ev,
|
||||
.get_txbf_conf_scheme = ath10k_wmi_10_4_txbf_conf_scheme,
|
||||
|
@ -6466,6 +6582,8 @@ static const struct wmi_ops wmi_10_4_ops = {
|
|||
.gen_vdev_down = ath10k_wmi_op_gen_vdev_down,
|
||||
.gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param,
|
||||
.gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key,
|
||||
.gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf,
|
||||
.gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable,
|
||||
.gen_peer_create = ath10k_wmi_op_gen_peer_create,
|
||||
.gen_peer_delete = ath10k_wmi_op_gen_peer_delete,
|
||||
.gen_peer_flush = ath10k_wmi_op_gen_peer_flush,
|
||||
|
@ -6482,6 +6600,10 @@ static const struct wmi_ops wmi_10_4_ops = {
|
|||
.gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable,
|
||||
.gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable,
|
||||
.gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode,
|
||||
.gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp,
|
||||
.gen_addba_send = ath10k_wmi_op_gen_addba_send,
|
||||
.gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp,
|
||||
.gen_delba_send = ath10k_wmi_op_gen_delba_send,
|
||||
|
||||
/* shared with 10.2 */
|
||||
.gen_peer_assoc = ath10k_wmi_10_2_op_gen_peer_assoc,
|
||||
|
|
|
@ -2973,9 +2973,19 @@ struct wmi_10_4_mgmt_rx_event {
|
|||
#define WMI_RX_STATUS_ERR_MIC 0x10
|
||||
#define WMI_RX_STATUS_ERR_KEY_CACHE_MISS 0x20
|
||||
|
||||
#define PHY_ERROR_SPECTRAL_SCAN 0x26
|
||||
#define PHY_ERROR_FALSE_RADAR_EXT 0x24
|
||||
#define PHY_ERROR_RADAR 0x05
|
||||
#define PHY_ERROR_GEN_SPECTRAL_SCAN 0x26
|
||||
#define PHY_ERROR_GEN_FALSE_RADAR_EXT 0x24
|
||||
#define PHY_ERROR_GEN_RADAR 0x05
|
||||
|
||||
#define PHY_ERROR_10_4_RADAR_MASK 0x4
|
||||
#define PHY_ERROR_10_4_SPECTRAL_SCAN_MASK 0x4000000
|
||||
|
||||
enum phy_err_type {
|
||||
PHY_ERROR_UNKNOWN,
|
||||
PHY_ERROR_SPECTRAL_SCAN,
|
||||
PHY_ERROR_FALSE_RADAR_EXT,
|
||||
PHY_ERROR_RADAR
|
||||
};
|
||||
|
||||
struct wmi_phyerr {
|
||||
__le32 tsf_timestamp;
|
||||
|
@ -2998,6 +3008,23 @@ struct wmi_phyerr_event {
|
|||
struct wmi_phyerr phyerrs[0];
|
||||
} __packed;
|
||||
|
||||
struct wmi_10_4_phyerr_event {
|
||||
__le32 tsf_l32;
|
||||
__le32 tsf_u32;
|
||||
__le16 freq1;
|
||||
__le16 freq2;
|
||||
u8 rssi_combined;
|
||||
u8 chan_width_mhz;
|
||||
u8 phy_err_code;
|
||||
u8 rsvd0;
|
||||
__le32 rssi_chains[4];
|
||||
__le16 nf_chains[4];
|
||||
__le32 phy_err_mask[2];
|
||||
__le32 tsf_timestamp;
|
||||
__le32 buf_len;
|
||||
u8 buf[0];
|
||||
} __packed;
|
||||
|
||||
#define PHYERR_TLV_SIG 0xBB
|
||||
#define PHYERR_TLV_TAG_SEARCH_FFT_REPORT 0xFB
|
||||
#define PHYERR_TLV_TAG_RADAR_PULSE_SUMMARY 0xF8
|
||||
|
@ -5590,6 +5617,7 @@ struct wmi_peer_sta_kickout_event {
|
|||
} __packed;
|
||||
|
||||
#define WMI_CHAN_INFO_FLAG_COMPLETE BIT(0)
|
||||
#define WMI_CHAN_INFO_FLAG_PRE_COMPLETE BIT(1)
|
||||
|
||||
/* Beacon filter wmi command info */
|
||||
#define BCN_FLT_MAX_SUPPORTED_IES 256
|
||||
|
@ -5788,11 +5816,24 @@ struct wmi_swba_ev_arg {
|
|||
};
|
||||
|
||||
struct wmi_phyerr_ev_arg {
|
||||
__le32 num_phyerrs;
|
||||
__le32 tsf_l32;
|
||||
__le32 tsf_u32;
|
||||
__le32 buf_len;
|
||||
const struct wmi_phyerr *phyerrs;
|
||||
u32 tsf_timestamp;
|
||||
u16 freq1;
|
||||
u16 freq2;
|
||||
u8 rssi_combined;
|
||||
u8 chan_width_mhz;
|
||||
u8 phy_err_code;
|
||||
u16 nf_chains[4];
|
||||
u32 buf_len;
|
||||
const u8 *buf;
|
||||
u8 hdr_len;
|
||||
};
|
||||
|
||||
struct wmi_phyerr_hdr_arg {
|
||||
u32 num_phyerrs;
|
||||
u32 tsf_l32;
|
||||
u32 tsf_u32;
|
||||
u32 buf_len;
|
||||
const void *phyerrs;
|
||||
};
|
||||
|
||||
struct wmi_svc_rdy_ev_arg {
|
||||
|
@ -6070,9 +6111,9 @@ void ath10k_wmi_event_peer_sta_kickout(struct ath10k *ar, struct sk_buff *skb);
|
|||
void ath10k_wmi_event_host_swba(struct ath10k *ar, struct sk_buff *skb);
|
||||
void ath10k_wmi_event_tbttoffset_update(struct ath10k *ar, struct sk_buff *skb);
|
||||
void ath10k_wmi_event_dfs(struct ath10k *ar,
|
||||
const struct wmi_phyerr *phyerr, u64 tsf);
|
||||
struct wmi_phyerr_ev_arg *phyerr, u64 tsf);
|
||||
void ath10k_wmi_event_spectral_scan(struct ath10k *ar,
|
||||
const struct wmi_phyerr *phyerr,
|
||||
struct wmi_phyerr_ev_arg *phyerr,
|
||||
u64 tsf);
|
||||
void ath10k_wmi_event_phyerr(struct ath10k *ar, struct sk_buff *skb);
|
||||
void ath10k_wmi_event_roam(struct ath10k *ar, struct sk_buff *skb);
|
||||
|
@ -6101,5 +6142,6 @@ void ath10k_wmi_event_vdev_standby_req(struct ath10k *ar, struct sk_buff *skb);
|
|||
void ath10k_wmi_event_vdev_resume_req(struct ath10k *ar, struct sk_buff *skb);
|
||||
void ath10k_wmi_event_service_ready(struct ath10k *ar, struct sk_buff *skb);
|
||||
int ath10k_wmi_event_ready(struct ath10k *ar, struct sk_buff *skb);
|
||||
|
||||
int ath10k_wmi_op_pull_phyerr_ev(struct ath10k *ar, const void *phyerr_buf,
|
||||
int left_len, struct wmi_phyerr_ev_arg *arg);
|
||||
#endif /* _WMI_H_ */
|
||||
|
|
|
@ -806,7 +806,7 @@ int wmi_call(struct wil6210_priv *wil, u16 cmdid, void *buf, u16 len,
|
|||
u16 reply_id, void *reply, u8 reply_size, int to_msec)
|
||||
{
|
||||
int rc;
|
||||
int remain;
|
||||
unsigned long remain;
|
||||
|
||||
mutex_lock(&wil->wmi_mutex);
|
||||
|
||||
|
|
Loading…
Reference in a new issue