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drm/amdgpu: switch to use smuio callbacks for NV family

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Switch to smuio callbacks: use smuio v11_0_6 callbacks for
Sienna_cichlid and forward ASIC, use smuio v11_0 callbacks for the
other NV family ASIC.

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Likun Gao 2021-02-03 18:23:49 +08:00 committed by Alex Deucher
parent 1deb98534c
commit 0bf7f2dcb9
1 changed files with 15 additions and 3 deletions
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18
drivers/gpu/drm/amd/amdgpu/nv.c
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@ -38,7 +38,6 @@
#include "gc/gc_10_1_0_offset.h"
#include "gc/gc_10_1_0_sh_mask.h"
#include "smuio/smuio_11_0_0_offset.h"
#include "mp/mp_11_0_offset.h"
#include "soc15.h"
@ -61,6 +60,8 @@
#include "dce_virtual.h"
#include "mes_v10_1.h"
#include "mxgpu_nv.h"
#include "smuio_v11_0.h"
#include "smuio_v11_0_6.h"
static const struct amd_ip_funcs nv_common_ip_funcs;
@ -202,6 +203,7 @@ static bool nv_read_bios_from_rom(struct amdgpu_device *adev,
{
u32 *dw_ptr;
u32 i, length_dw;
u32 rom_index_offset, rom_data_offset;
if (bios == NULL)
return false;
@ -214,11 +216,16 @@ static bool nv_read_bios_from_rom(struct amdgpu_device *adev,
dw_ptr = (u32 *)bios;
length_dw = ALIGN(length_bytes, 4) / 4;
rom_index_offset =
adev->smuio.funcs->get_rom_index_offset(adev);
rom_data_offset =
adev->smuio.funcs->get_rom_data_offset(adev);
/* set rom index to 0 */
WREG32(SOC15_REG_OFFSET(SMUIO, 0, mmROM_INDEX), 0);
WREG32(rom_index_offset, 0);
/* read out the rom data */
for (i = 0; i < length_dw; i++)
dw_ptr[i] = RREG32(SOC15_REG_OFFSET(SMUIO, 0, mmROM_DATA));
dw_ptr[i] = RREG32(rom_data_offset);
return true;
}
@ -564,6 +571,11 @@ int nv_set_ip_blocks(struct amdgpu_device *adev)
}
adev->hdp.funcs = &hdp_v5_0_funcs;
if (adev->asic_type >= CHIP_SIENNA_CICHLID)
adev->smuio.funcs = &smuio_v11_0_6_funcs;
else
adev->smuio.funcs = &smuio_v11_0_funcs;
if (adev->asic_type == CHIP_SIENNA_CICHLID)
adev->gmc.xgmi.supported = true;