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arm64: dts: ti: k3-am64-main: Remove support for HS400 speed mode
AM64 SoC, does not support HS400 and HS200 is the maximum supported speed
mode[1]. Therefore, fix the device tree node to reflect the same.
[1] - https://www.ti.com/lit/ds/symlink/am6442.pdf
(SPRSP56C – JANUARY 2021 – REVISED FEBRUARY 2022)
Fixes: 8abae9389b
("arm64: dts: ti: Add support for AM642 SoC")
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Link: https://lore.kernel.org/r/20220512064859.32059-1-a-govindraju@ti.com
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1 changed files with 0 additions and 2 deletions
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@ -456,13 +456,11 @@ sdhci0: mmc@fa10000 {
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clock-names = "clk_ahb", "clk_xin";
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clock-names = "clk_ahb", "clk_xin";
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mmc-ddr-1_8v;
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mmc-ddr-1_8v;
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mmc-hs200-1_8v;
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mmc-hs200-1_8v;
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mmc-hs400-1_8v;
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ti,trm-icp = <0x2>;
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ti,trm-icp = <0x2>;
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ti,otap-del-sel-legacy = <0x0>;
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ti,otap-del-sel-legacy = <0x0>;
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ti,otap-del-sel-mmc-hs = <0x0>;
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ti,otap-del-sel-mmc-hs = <0x0>;
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ti,otap-del-sel-ddr52 = <0x6>;
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ti,otap-del-sel-ddr52 = <0x6>;
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ti,otap-del-sel-hs200 = <0x7>;
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ti,otap-del-sel-hs200 = <0x7>;
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ti,otap-del-sel-hs400 = <0x4>;
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};
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};
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sdhci1: mmc@fa00000 {
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sdhci1: mmc@fa00000 {
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