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drm/i915/guc: general tidying up (loader)
Renaming to more consistent scheme, delete unused definitions Signed-off-by: Dave Gordon <david.s.gordon@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1473711577-11454-3-git-send-email-david.s.gordon@intel.com Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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parent
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commit
0c5664e417
2 changed files with 16 additions and 14 deletions
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@ -103,9 +103,6 @@
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#define HOST2GUC_INTERRUPT _MMIO(0xc4c8)
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#define HOST2GUC_TRIGGER (1<<0)
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#define DRBMISC1 0x1984
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#define DOORBELL_ENABLE (1<<0)
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#define GEN8_DRBREGL(x) _MMIO(0x1000 + (x) * 8)
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#define GEN8_DRB_VALID (1<<0)
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#define GEN8_DRBREGU(x) _MMIO(0x1000 + (x) * 8 + 4)
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@ -97,7 +97,7 @@ const char *intel_guc_fw_status_repr(enum intel_guc_fw_status status)
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}
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};
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static void direct_interrupts_to_host(struct drm_i915_private *dev_priv)
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static void guc_interrupts_release(struct drm_i915_private *dev_priv)
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{
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struct intel_engine_cs *engine;
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int irqs;
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@ -114,7 +114,7 @@ static void direct_interrupts_to_host(struct drm_i915_private *dev_priv)
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I915_WRITE(GUC_WD_VECS_IER, 0);
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}
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static void direct_interrupts_to_guc(struct drm_i915_private *dev_priv)
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static void guc_interrupts_capture(struct drm_i915_private *dev_priv)
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{
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struct intel_engine_cs *engine;
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int irqs;
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@ -179,7 +179,12 @@ static u32 get_core_family(struct drm_i915_private *dev_priv)
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}
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}
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static void set_guc_init_params(struct drm_i915_private *dev_priv)
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/*
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* Initialise the GuC parameter block before starting the firmware
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* transfer. These parameters are read by the firmware on startup
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* and cannot be changed thereafter.
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*/
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static void guc_params_init(struct drm_i915_private *dev_priv)
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{
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struct intel_guc *guc = &dev_priv->guc;
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u32 params[GUC_CTL_MAX_DWORDS];
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@ -392,11 +397,11 @@ static int guc_ucode_xfer(struct drm_i915_private *dev_priv)
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I915_WRITE(GEN7_MISCCPCTL, (GEN8_DOP_CLOCK_GATE_GUC_ENABLE |
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I915_READ(GEN7_MISCCPCTL)));
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/* allows for 5us before GT can go to RC6 */
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/* allows for 5us (in 10ns units) before GT can go to RC6 */
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I915_WRITE(GUC_ARAT_C6DIS, 0x1FF);
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}
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set_guc_init_params(dev_priv);
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guc_params_init(dev_priv);
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ret = guc_ucode_xfer_dma(dev_priv, vma);
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@ -411,7 +416,7 @@ static int guc_ucode_xfer(struct drm_i915_private *dev_priv)
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return ret;
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}
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static int i915_reset_guc(struct drm_i915_private *dev_priv)
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static int guc_hw_reset(struct drm_i915_private *dev_priv)
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{
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int ret;
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u32 guc_status;
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@ -478,7 +483,7 @@ int intel_guc_setup(struct drm_device *dev)
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goto fail;
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}
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direct_interrupts_to_host(dev_priv);
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guc_interrupts_release(dev_priv);
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guc_fw->guc_fw_load_status = GUC_FIRMWARE_PENDING;
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@ -501,7 +506,7 @@ int intel_guc_setup(struct drm_device *dev)
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* Always reset the GuC just before (re)loading, so
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* that the state and timing are fairly predictable
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*/
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err = i915_reset_guc(dev_priv);
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err = guc_hw_reset(dev_priv);
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if (err)
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goto fail;
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@ -526,7 +531,7 @@ int intel_guc_setup(struct drm_device *dev)
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err = i915_guc_submission_enable(dev_priv);
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if (err)
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goto fail;
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direct_interrupts_to_guc(dev_priv);
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guc_interrupts_capture(dev_priv);
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}
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return 0;
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@ -535,7 +540,7 @@ int intel_guc_setup(struct drm_device *dev)
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if (guc_fw->guc_fw_load_status == GUC_FIRMWARE_PENDING)
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guc_fw->guc_fw_load_status = GUC_FIRMWARE_FAIL;
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direct_interrupts_to_host(dev_priv);
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guc_interrupts_release(dev_priv);
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i915_guc_submission_disable(dev_priv);
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i915_guc_submission_fini(dev_priv);
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@ -768,7 +773,7 @@ void intel_guc_fini(struct drm_device *dev)
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struct intel_guc_fw *guc_fw = &dev_priv->guc.guc_fw;
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mutex_lock(&dev->struct_mutex);
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direct_interrupts_to_host(dev_priv);
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guc_interrupts_release(dev_priv);
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i915_guc_submission_disable(dev_priv);
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i915_guc_submission_fini(dev_priv);
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