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powerpc/pseries/iommu: Replace hard-coded page shift
Some functions assume IOMMU page size can only be 4K (pageshift == 12). Update them to accept any page size passed, so we can use 64K pages. In the process, some defines like TCE_SHIFT were made obsolete, and then removed. IODA3 Revision 3.0_prd1 (OpenPowerFoundation), Figures 3.4 and 3.5 show a RPN of 52-bit, and considers a 12-bit pageshift, so there should be no need of using TCE_RPN_MASK, which masks out any bit after 40 in rpn. It's usage removed from tce_build_pSeries(), tce_build_pSeriesLP(), and tce_buildmulti_pSeriesLP(). Most places had a tbl struct, so using tbl->it_page_shift was simple. tce_free_pSeriesLP() was a special case, since callers not always have a tbl struct, so adding a tceshift parameter seems the right thing to do. Signed-off-by: Leonardo Bras <leobras.c@gmail.com> Reviewed-by: Alexey Kardashevskiy <aik@ozlabs.ru> Reviewed-by: Frederic Barrat <fbarrat@linux.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20210817063929.38701-2-leobras.c@gmail.com
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9a245d0e1f
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0c634bafe3
2 changed files with 23 additions and 24 deletions
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@ -19,15 +19,7 @@
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#define TCE_VB 0
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#define TCE_PCI 1
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/* TCE page size is 4096 bytes (1 << 12) */
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#define TCE_SHIFT 12
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#define TCE_PAGE_SIZE (1 << TCE_SHIFT)
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#define TCE_ENTRY_SIZE 8 /* each TCE is 64 bits */
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#define TCE_RPN_MASK 0xfffffffffful /* 40-bit RPN (4K pages) */
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#define TCE_RPN_SHIFT 12
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#define TCE_VALID 0x800 /* TCE valid */
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#define TCE_ALLIO 0x400 /* TCE valid for all lpars */
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#define TCE_PCI_WRITE 0x2 /* write from PCI allowed */
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@ -107,6 +107,8 @@ static int tce_build_pSeries(struct iommu_table *tbl, long index,
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u64 proto_tce;
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__be64 *tcep;
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u64 rpn;
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const unsigned long tceshift = tbl->it_page_shift;
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const unsigned long pagesize = IOMMU_PAGE_SIZE(tbl);
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proto_tce = TCE_PCI_READ; // Read allowed
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@ -117,10 +119,10 @@ static int tce_build_pSeries(struct iommu_table *tbl, long index,
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while (npages--) {
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/* can't move this out since we might cross MEMBLOCK boundary */
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rpn = __pa(uaddr) >> TCE_SHIFT;
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*tcep = cpu_to_be64(proto_tce | (rpn & TCE_RPN_MASK) << TCE_RPN_SHIFT);
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rpn = __pa(uaddr) >> tceshift;
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*tcep = cpu_to_be64(proto_tce | rpn << tceshift);
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uaddr += TCE_PAGE_SIZE;
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uaddr += pagesize;
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tcep++;
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}
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return 0;
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@ -146,7 +148,7 @@ static unsigned long tce_get_pseries(struct iommu_table *tbl, long index)
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return be64_to_cpu(*tcep);
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}
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static void tce_free_pSeriesLP(unsigned long liobn, long, long);
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static void tce_free_pSeriesLP(unsigned long liobn, long, long, long);
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static void tce_freemulti_pSeriesLP(struct iommu_table*, long, long);
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static int tce_build_pSeriesLP(unsigned long liobn, long tcenum, long tceshift,
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@ -166,12 +168,12 @@ static int tce_build_pSeriesLP(unsigned long liobn, long tcenum, long tceshift,
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proto_tce |= TCE_PCI_WRITE;
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while (npages--) {
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tce = proto_tce | (rpn & TCE_RPN_MASK) << tceshift;
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tce = proto_tce | rpn << tceshift;
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rc = plpar_tce_put((u64)liobn, (u64)tcenum << tceshift, tce);
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if (unlikely(rc == H_NOT_ENOUGH_RESOURCES)) {
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ret = (int)rc;
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tce_free_pSeriesLP(liobn, tcenum_start,
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tce_free_pSeriesLP(liobn, tcenum_start, tceshift,
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(npages_start - (npages + 1)));
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break;
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}
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@ -205,10 +207,11 @@ static int tce_buildmulti_pSeriesLP(struct iommu_table *tbl, long tcenum,
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long tcenum_start = tcenum, npages_start = npages;
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int ret = 0;
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unsigned long flags;
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const unsigned long tceshift = tbl->it_page_shift;
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if ((npages == 1) || !firmware_has_feature(FW_FEATURE_PUT_TCE_IND)) {
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return tce_build_pSeriesLP(tbl->it_index, tcenum,
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tbl->it_page_shift, npages, uaddr,
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tceshift, npages, uaddr,
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direction, attrs);
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}
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@ -225,13 +228,13 @@ static int tce_buildmulti_pSeriesLP(struct iommu_table *tbl, long tcenum,
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if (!tcep) {
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local_irq_restore(flags);
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return tce_build_pSeriesLP(tbl->it_index, tcenum,
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tbl->it_page_shift,
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tceshift,
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npages, uaddr, direction, attrs);
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}
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__this_cpu_write(tce_page, tcep);
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}
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rpn = __pa(uaddr) >> TCE_SHIFT;
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rpn = __pa(uaddr) >> tceshift;
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proto_tce = TCE_PCI_READ;
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if (direction != DMA_TO_DEVICE)
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proto_tce |= TCE_PCI_WRITE;
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@ -245,12 +248,12 @@ static int tce_buildmulti_pSeriesLP(struct iommu_table *tbl, long tcenum,
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limit = min_t(long, npages, 4096/TCE_ENTRY_SIZE);
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for (l = 0; l < limit; l++) {
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tcep[l] = cpu_to_be64(proto_tce | (rpn & TCE_RPN_MASK) << TCE_RPN_SHIFT);
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tcep[l] = cpu_to_be64(proto_tce | rpn << tceshift);
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rpn++;
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}
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rc = plpar_tce_put_indirect((u64)tbl->it_index,
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(u64)tcenum << 12,
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(u64)tcenum << tceshift,
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(u64)__pa(tcep),
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limit);
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@ -277,12 +280,13 @@ static int tce_buildmulti_pSeriesLP(struct iommu_table *tbl, long tcenum,
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return ret;
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}
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static void tce_free_pSeriesLP(unsigned long liobn, long tcenum, long npages)
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static void tce_free_pSeriesLP(unsigned long liobn, long tcenum, long tceshift,
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long npages)
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{
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u64 rc;
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while (npages--) {
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rc = plpar_tce_put((u64)liobn, (u64)tcenum << 12, 0);
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rc = plpar_tce_put((u64)liobn, (u64)tcenum << tceshift, 0);
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if (rc && printk_ratelimit()) {
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printk("tce_free_pSeriesLP: plpar_tce_put failed. rc=%lld\n", rc);
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@ -301,9 +305,11 @@ static void tce_freemulti_pSeriesLP(struct iommu_table *tbl, long tcenum, long n
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u64 rc;
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if (!firmware_has_feature(FW_FEATURE_STUFF_TCE))
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return tce_free_pSeriesLP(tbl->it_index, tcenum, npages);
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return tce_free_pSeriesLP(tbl->it_index, tcenum,
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tbl->it_page_shift, npages);
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rc = plpar_tce_stuff((u64)tbl->it_index, (u64)tcenum << 12, 0, npages);
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rc = plpar_tce_stuff((u64)tbl->it_index,
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(u64)tcenum << tbl->it_page_shift, 0, npages);
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if (rc && printk_ratelimit()) {
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printk("tce_freemulti_pSeriesLP: plpar_tce_stuff failed\n");
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@ -319,7 +325,8 @@ static unsigned long tce_get_pSeriesLP(struct iommu_table *tbl, long tcenum)
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u64 rc;
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unsigned long tce_ret;
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rc = plpar_tce_get((u64)tbl->it_index, (u64)tcenum << 12, &tce_ret);
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rc = plpar_tce_get((u64)tbl->it_index,
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(u64)tcenum << tbl->it_page_shift, &tce_ret);
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if (rc && printk_ratelimit()) {
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printk("tce_get_pSeriesLP: plpar_tce_get failed. rc=%lld\n", rc);
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