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ARM: dts: at91: fix pinctrl phandles
Commitbf781869e5
("ARM: dts: at91: add pinctrl-{names, 0} for all gpios") introduces pinctrl phandles for pins used by individual controllers to avoid failures due to commit2ab73c6d83
("gpio: Support GPIO controllers without pin-ranges"). For SPI controllers available on SAMA5D4 and SAMA5D3 some of the pins are defined in SoC specific dtsi on behalf of pinctrl-0. Adding extra pinctrl phandles on board specific dts also on behalf of pinctrl-0 overwrite the pinctrl-0 phandle specified in SoC specific dtsi. Thus add the board specific pinctrl to pinctrl-1. Fixes:bf781869e5
("ARM: dts: at91: add pinctrl-{names, 0} for all gpios") Depends-on:5c8b498529
("ARM: dts: at91: sama5d4_xplained: fix pinctrl phandle name") Reported-by: Ajay Kathat <ajay.kathat@microchip.com> Co-developed-by: Ajay Kathat <ajay.kathat@microchip.com> Signed-off-by: Ajay Kathat <ajay.kathat@microchip.com> Tested-by: Ajay Kathat <ajay.kathat@microchip.com> Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com> Link: https://lore.kernel.org/r/20220331141323.194355-2-claudiu.beznea@microchip.com
This commit is contained in:
parent
5c8b498529
commit
0c640d9544
2 changed files with 6 additions and 6 deletions
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@ -57,8 +57,8 @@ slot@0 {
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};
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spi0: spi@f0004000 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_spi0_cs>;
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pinctrl-names = "default", "cs";
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pinctrl-1 = <&pinctrl_spi0_cs>;
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cs-gpios = <&pioD 13 0>, <0>, <0>, <&pioD 16 0>;
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status = "okay";
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};
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@ -171,8 +171,8 @@ slot@0 {
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};
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spi1: spi@f8008000 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_spi1_cs>;
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pinctrl-names = "default", "cs";
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pinctrl-1 = <&pinctrl_spi1_cs>;
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cs-gpios = <&pioC 25 0>;
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status = "okay";
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};
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@ -81,8 +81,8 @@ usart4: serial@fc010000 {
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};
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spi1: spi@fc018000 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_spi1_cs>;
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pinctrl-names = "default", "cs";
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pinctrl-1 = <&pinctrl_spi1_cs>;
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cs-gpios = <&pioB 21 0>;
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status = "okay";
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};
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