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[PATCH] ARM: 2784/1: Fix the block cache flush operation range
Patch from Catalin Marinas The range for the ARMv6 block cache operations is inclusive but the kernel doesn't re-calculate the end address, causing a page fault when used (this only happens with support for cache aliasing, otherwise the blk_flush_kern_dcache_page() is not called). This patch subtracts L1_CACHE_BYTES from the end address. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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1 changed files with 2 additions and 1 deletions
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@ -25,13 +25,14 @@ blk_flush_kern_dcache_page(void *kaddr)
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{
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asm(
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"add r1, r0, %0 \n\
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sub r1, r1, %1 \n\
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1: .word 0xec401f0e @ mcrr p15, 0, r0, r1, c14, 0 @ blocking \n\
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mov r0, #0 \n\
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mcr p15, 0, r0, c7, c5, 0 \n\
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mcr p15, 0, r0, c7, c10, 4 \n\
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mov pc, lr"
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:
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: "I" (PAGE_SIZE));
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: "I" (PAGE_SIZE), "I" (L1_CACHE_BYTES));
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}
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/*
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