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ARM: OMAP2+: Drop legacy platform data for omap5 dwc3 

We can now probe devices with ti-sysc interconnect driver and dts
data. Let's drop the related platform data and custom ti,hwmods
dts property.

As we're just dropping data, and the early platform data init
is based on the custom ti,hwmods property, we want to drop both
the platform data and ti,hwmods property in a single patch.

Signed-off-by: Tony Lindgren <tony@atomide.com>
This commit is contained in:
Tony Lindgren 2020-07-13 09:59:48 -07:00
parent 3c881456b6
commit 0db53013cd
2 changed files with 0 additions and 53 deletions
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1
arch/arm/boot/dts/omap5-l4.dtsi
View File

@ -167,7 +167,6 @@
target-module@20000 { /* 0x4a020000, ap 109 08.0 */
compatible = "ti,sysc-omap4", "ti,sysc";
ti,hwmods = "usb_otg_ss";
reg = <0x20000 0x4>,
<0x20010 0x4>;
reg-names = "rev", "sysc";

52
arch/arm/mach-omap2/omap_hwmod_54xx_data.c
View File

@ -375,49 +375,6 @@ static struct omap_hwmod omap54xx_usb_tll_hs_hwmod = {
},
};
/*
* 'usb_otg_ss' class
* 2.0 super speed (usb_otg_ss) controller
*/
static struct omap_hwmod_class_sysconfig omap54xx_usb_otg_ss_sysc = {
.rev_offs = 0x0000,
.sysc_offs = 0x0010,
.sysc_flags = (SYSC_HAS_DMADISABLE | SYSC_HAS_MIDLEMODE |
SYSC_HAS_SIDLEMODE),
.idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
SIDLE_SMART_WKUP | MSTANDBY_FORCE | MSTANDBY_NO |
MSTANDBY_SMART | MSTANDBY_SMART_WKUP),
.sysc_fields = &omap_hwmod_sysc_type2,
};
static struct omap_hwmod_class omap54xx_usb_otg_ss_hwmod_class = {
.name = "usb_otg_ss",
.sysc = &omap54xx_usb_otg_ss_sysc,
};
/* usb_otg_ss */
static struct omap_hwmod_opt_clk usb_otg_ss_opt_clks[] = {
{ .role = "refclk960m", .clk = "usb_otg_ss_refclk960m" },
};
static struct omap_hwmod omap54xx_usb_otg_ss_hwmod = {
.name = "usb_otg_ss",
.class = &omap54xx_usb_otg_ss_hwmod_class,
.clkdm_name = "l3init_clkdm",
.flags = HWMOD_SWSUP_SIDLE,
.main_clk = "dpll_core_h13x2_ck",
.prcm = {
.omap4 = {
.clkctrl_offs = OMAP54XX_CM_L3INIT_USB_OTG_SS_CLKCTRL_OFFSET,
.context_offs = OMAP54XX_RM_L3INIT_USB_OTG_SS_CONTEXT_OFFSET,
.modulemode = MODULEMODE_HWCTRL,
},
},
.opt_clks = usb_otg_ss_opt_clks,
.opt_clks_cnt = ARRAY_SIZE(usb_otg_ss_opt_clks),
};
/*
* 'sata' class
* sata: serial ata interface gen2 compliant ( 1 rx/ 1 tx)
@ -635,14 +592,6 @@ static struct omap_hwmod_ocp_if omap54xx_l4_cfg__usb_tll_hs = {
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
/* l4_cfg -> usb_otg_ss */
static struct omap_hwmod_ocp_if omap54xx_l4_cfg__usb_otg_ss = {
.master = &omap54xx_l4_cfg_hwmod,
.slave = &omap54xx_usb_otg_ss_hwmod,
.clk = "dpll_core_h13x2_ck",
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
static struct omap_hwmod_ocp_if *omap54xx_hwmod_ocp_ifs[] __initdata = {
&omap54xx_l3_main_1__dmm,
&omap54xx_l3_main_3__l3_instr,
@ -665,7 +614,6 @@ static struct omap_hwmod_ocp_if *omap54xx_hwmod_ocp_ifs[] __initdata = {
&omap54xx_l4_cfg__mpu,
&omap54xx_l4_cfg__usb_host_hs,
&omap54xx_l4_cfg__usb_tll_hs,
&omap54xx_l4_cfg__usb_otg_ss,
&omap54xx_l4_cfg__sata,
NULL,
};