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MIPS: Add Cavium OCTEON processor constants and CPU probe.
Add OCTEON constants to asm/cpu.h and asm/module.h. Add probe function for Cavium OCTEON CPUs and hook it up. Signed-off-by: Tomaso Paoletti <tpaoletti@caviumnetworks.com> Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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3 changed files with 41 additions and 0 deletions
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@ -33,6 +33,7 @@
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#define PRID_COMP_TOSHIBA 0x070000
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#define PRID_COMP_LSI 0x080000
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#define PRID_COMP_LEXRA 0x0b0000
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#define PRID_COMP_CAVIUM 0x0d0000
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/*
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@ -113,6 +114,18 @@
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#define PRID_IMP_BCM4710 0x4000
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#define PRID_IMP_BCM3302 0x9000
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/*
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* These are the PRID's for when 23:16 == PRID_COMP_CAVIUM
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*/
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#define PRID_IMP_CAVIUM_CN38XX 0x0000
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#define PRID_IMP_CAVIUM_CN31XX 0x0100
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#define PRID_IMP_CAVIUM_CN30XX 0x0200
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#define PRID_IMP_CAVIUM_CN58XX 0x0300
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#define PRID_IMP_CAVIUM_CN56XX 0x0400
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#define PRID_IMP_CAVIUM_CN50XX 0x0600
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#define PRID_IMP_CAVIUM_CN52XX 0x0700
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/*
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* Definitions for 7:0 on legacy processors
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*/
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@ -203,6 +216,7 @@ enum cpu_type_enum {
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* MIPS64 class processors
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*/
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CPU_5KC, CPU_20KC, CPU_25KF, CPU_SB1, CPU_SB1A, CPU_LOONGSON2,
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CPU_CAVIUM_OCTEON,
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CPU_LAST
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};
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@ -116,6 +116,8 @@ search_module_dbetables(unsigned long addr)
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#define MODULE_PROC_FAMILY "SB1 "
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#elif defined CONFIG_CPU_LOONGSON2
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#define MODULE_PROC_FAMILY "LOONGSON2 "
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#elif defined CONFIG_CPU_CAVIUM_OCTEON
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#define MODULE_PROC_FAMILY "OCTEON "
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#else
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#error MODULE_PROC_FAMILY undefined for your processor configuration
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#endif
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@ -154,6 +154,7 @@ void __init check_wait(void)
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case CPU_25KF:
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case CPU_PR4450:
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case CPU_BCM3302:
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case CPU_CAVIUM_OCTEON:
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cpu_wait = r4k_wait;
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break;
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@ -875,6 +876,27 @@ static inline void cpu_probe_broadcom(struct cpuinfo_mips *c, unsigned int cpu)
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}
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}
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static inline void cpu_probe_cavium(struct cpuinfo_mips *c, unsigned int cpu)
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{
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decode_configs(c);
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switch (c->processor_id & 0xff00) {
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case PRID_IMP_CAVIUM_CN38XX:
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case PRID_IMP_CAVIUM_CN31XX:
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case PRID_IMP_CAVIUM_CN30XX:
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case PRID_IMP_CAVIUM_CN58XX:
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case PRID_IMP_CAVIUM_CN56XX:
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case PRID_IMP_CAVIUM_CN50XX:
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case PRID_IMP_CAVIUM_CN52XX:
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c->cputype = CPU_CAVIUM_OCTEON;
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__cpu_name[cpu] = "Cavium Octeon";
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break;
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default:
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printk(KERN_INFO "Unknown Octeon chip!\n");
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c->cputype = CPU_UNKNOWN;
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break;
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}
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}
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const char *__cpu_name[NR_CPUS];
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__cpuinit void cpu_probe(void)
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@ -909,6 +931,9 @@ __cpuinit void cpu_probe(void)
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case PRID_COMP_NXP:
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cpu_probe_nxp(c, cpu);
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break;
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case PRID_COMP_CAVIUM:
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cpu_probe_cavium(c, cpu);
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break;
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}
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BUG_ON(!__cpu_name[cpu]);
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