drm/amd/display: fix clk_mgr naming

clk_mgr is called dccg in dc_state, this change fixes that

Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Eric Bernstein <Eric.Bernstein@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Dmytro Laktyushkin 2019-03-20 17:10:41 -04:00 committed by Alex Deucher
parent e49f69363a
commit 0de34efc7b
4 changed files with 5 additions and 5 deletions

View file

@ -1399,7 +1399,7 @@ static enum dc_status enable_link_dp(
pipe_ctx->stream_res.pix_clk_params.requested_sym_clk =
link_settings.link_rate * LINK_RATE_REF_FREQ_IN_KHZ;
state->dccg->funcs->update_clocks(state->dccg, state, false);
state->clk_mgr->funcs->update_clocks(state->clk_mgr, state, false);
dp_enable_link_phy(
link,

View file

@ -2064,7 +2064,7 @@ void dc_resource_state_construct(
const struct dc *dc,
struct dc_state *dst_ctx)
{
dst_ctx->dccg = dc->res_pool->clk_mgr;
dst_ctx->clk_mgr = dc->res_pool->clk_mgr;
}
/**

View file

@ -1166,8 +1166,8 @@ static void build_audio_output(
if (pipe_ctx->stream->signal == SIGNAL_TYPE_DISPLAY_PORT ||
pipe_ctx->stream->signal == SIGNAL_TYPE_DISPLAY_PORT_MST) {
audio_output->pll_info.dp_dto_source_clock_in_khz =
state->dccg->funcs->get_dp_ref_clk_frequency(
state->dccg);
state->clk_mgr->funcs->get_dp_ref_clk_frequency(
state->clk_mgr);
}
audio_output->pll_info.feed_back_divider =

View file

@ -301,7 +301,7 @@ struct dc_state {
struct dcn_bw_internal_vars dcn_bw_vars;
#endif
struct clk_mgr *dccg;
struct clk_mgr *clk_mgr;
struct {
bool full_update_needed : 1;