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drm/i915/scheduler: Signal the arrival of a new request
The start of the scheduler, add a hook into request submission for the scheduler to see the arrival of new requests and prepare its runqueues. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/20161114204105.29171-6-chris@chris-wilson.co.uk
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5 changed files with 34 additions and 0 deletions
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@ -323,6 +323,10 @@ static int i915_getparam(struct drm_device *dev, void *data,
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*/
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*/
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value = i915_gem_mmap_gtt_version();
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value = i915_gem_mmap_gtt_version();
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break;
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break;
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case I915_PARAM_HAS_SCHEDULER:
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value = dev_priv->engine[RCS] &&
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dev_priv->engine[RCS]->schedule;
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break;
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case I915_PARAM_MMAP_VERSION:
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case I915_PARAM_MMAP_VERSION:
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/* Remember to bump this if the version changes! */
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/* Remember to bump this if the version changes! */
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case I915_PARAM_HAS_GEM:
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case I915_PARAM_HAS_GEM:
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@ -762,6 +762,19 @@ void __i915_add_request(struct drm_i915_gem_request *request, bool flush_caches)
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i915_gem_mark_busy(engine);
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i915_gem_mark_busy(engine);
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/* Let the backend know a new request has arrived that may need
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* to adjust the existing execution schedule due to a high priority
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* request - i.e. we may want to preempt the current request in order
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* to run a high priority dependency chain *before* we can execute this
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* request.
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*
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* This is called before the request is ready to run so that we can
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* decide whether to preempt the entire chain so that it is ready to
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* run at the earliest possible convenience.
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*/
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if (engine->schedule)
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engine->schedule(request, 0);
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local_bh_disable();
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local_bh_disable();
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i915_sw_fence_commit(&request->submit);
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i915_sw_fence_commit(&request->submit);
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local_bh_enable(); /* Kick the execlists tasklet if just scheduled */
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local_bh_enable(); /* Kick the execlists tasklet if just scheduled */
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@ -102,6 +102,9 @@ intel_engine_setup(struct drm_i915_private *dev_priv,
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engine->mmio_base = info->mmio_base;
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engine->mmio_base = info->mmio_base;
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engine->irq_shift = info->irq_shift;
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engine->irq_shift = info->irq_shift;
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/* Nothing to do here, execute in order of dependencies */
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engine->schedule = NULL;
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dev_priv->engine[id] = engine;
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dev_priv->engine[id] = engine;
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return 0;
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return 0;
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}
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}
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@ -267,6 +267,15 @@ struct intel_engine_cs {
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*/
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*/
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void (*submit_request)(struct drm_i915_gem_request *req);
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void (*submit_request)(struct drm_i915_gem_request *req);
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/* Call when the priority on a request has changed and it and its
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* dependencies may need rescheduling. Note the request itself may
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* not be ready to run!
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*
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* Called under the struct_mutex.
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*/
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void (*schedule)(struct drm_i915_gem_request *request,
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int priority);
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/* Some chipsets are not quite as coherent as advertised and need
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/* Some chipsets are not quite as coherent as advertised and need
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* an expensive kick to force a true read of the up-to-date seqno.
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* an expensive kick to force a true read of the up-to-date seqno.
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* However, the up-to-date seqno is not always required and the last
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* However, the up-to-date seqno is not always required and the last
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@ -389,6 +389,11 @@ typedef struct drm_i915_irq_wait {
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#define I915_PARAM_MIN_EU_IN_POOL 39
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#define I915_PARAM_MIN_EU_IN_POOL 39
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#define I915_PARAM_MMAP_GTT_VERSION 40
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#define I915_PARAM_MMAP_GTT_VERSION 40
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/* Query whether DRM_I915_GEM_EXECBUFFER2 supports user defined execution
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* priorities and the driver will attempt to execute batches in priority order.
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*/
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#define I915_PARAM_HAS_SCHEDULER 41
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typedef struct drm_i915_getparam {
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typedef struct drm_i915_getparam {
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__s32 param;
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__s32 param;
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/*
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/*
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