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perf/x86: add Intel SkyLake uncore IMC PMU support
This patch enables the uncore_imc PMU for Intel SkyLake Desktop processors (Core i7-6700, model 94). It is possible to compute memory read/write bandwidth using: $ perf stat -a -e uncore_imc/data_reads/,uncore_imc/data_writes/ .... Signed-off-by: Stephane Eranian <eranian@google.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Cc: Arnaldo Carvalho de Melo <acme@redhat.com> Cc: David Ahern <dsahern@gmail.com> Cc: Jiri Olsa <jolsa@redhat.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Vince Weaver <vincent.weaver@maine.edu> Cc: kan.liang@intel.com Link: http://lkml.kernel.org/r/1452151546-8853-1-git-send-email-eranian@google.com Signed-off-by: Ingo Molnar <mingo@kernel.org>
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3 changed files with 24 additions and 0 deletions
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@ -995,6 +995,9 @@ static int __init uncore_pci_init(void)
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case 87: /* Knights Landing */
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case 87: /* Knights Landing */
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ret = knl_uncore_pci_init();
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ret = knl_uncore_pci_init();
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break;
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break;
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case 94: /* SkyLake */
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ret = skl_uncore_pci_init();
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break;
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default:
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default:
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return 0;
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return 0;
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}
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}
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@ -336,6 +336,7 @@ int snb_uncore_pci_init(void);
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int ivb_uncore_pci_init(void);
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int ivb_uncore_pci_init(void);
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int hsw_uncore_pci_init(void);
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int hsw_uncore_pci_init(void);
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int bdw_uncore_pci_init(void);
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int bdw_uncore_pci_init(void);
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int skl_uncore_pci_init(void);
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void snb_uncore_cpu_init(void);
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void snb_uncore_cpu_init(void);
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void nhm_uncore_cpu_init(void);
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void nhm_uncore_cpu_init(void);
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int snb_pci2phy_map_init(int devid);
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int snb_pci2phy_map_init(int devid);
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@ -8,6 +8,7 @@
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#define PCI_DEVICE_ID_INTEL_HSW_IMC 0x0c00
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#define PCI_DEVICE_ID_INTEL_HSW_IMC 0x0c00
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#define PCI_DEVICE_ID_INTEL_HSW_U_IMC 0x0a04
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#define PCI_DEVICE_ID_INTEL_HSW_U_IMC 0x0a04
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#define PCI_DEVICE_ID_INTEL_BDW_IMC 0x1604
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#define PCI_DEVICE_ID_INTEL_BDW_IMC 0x1604
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#define PCI_DEVICE_ID_INTEL_SKL_IMC 0x191f
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/* SNB event control */
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/* SNB event control */
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#define SNB_UNC_CTL_EV_SEL_MASK 0x000000ff
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#define SNB_UNC_CTL_EV_SEL_MASK 0x000000ff
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@ -524,6 +525,14 @@ static const struct pci_device_id bdw_uncore_pci_ids[] = {
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{ /* end: all zeroes */ },
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{ /* end: all zeroes */ },
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};
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};
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static const struct pci_device_id skl_uncore_pci_ids[] = {
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{ /* IMC */
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PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_SKL_IMC),
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.driver_data = UNCORE_PCI_DEV_DATA(SNB_PCI_UNCORE_IMC, 0),
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},
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{ /* end: all zeroes */ },
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};
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static struct pci_driver snb_uncore_pci_driver = {
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static struct pci_driver snb_uncore_pci_driver = {
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.name = "snb_uncore",
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.name = "snb_uncore",
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.id_table = snb_uncore_pci_ids,
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.id_table = snb_uncore_pci_ids,
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@ -544,6 +553,11 @@ static struct pci_driver bdw_uncore_pci_driver = {
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.id_table = bdw_uncore_pci_ids,
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.id_table = bdw_uncore_pci_ids,
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};
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};
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static struct pci_driver skl_uncore_pci_driver = {
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.name = "skl_uncore",
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.id_table = skl_uncore_pci_ids,
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};
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struct imc_uncore_pci_dev {
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struct imc_uncore_pci_dev {
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__u32 pci_id;
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__u32 pci_id;
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struct pci_driver *driver;
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struct pci_driver *driver;
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@ -558,6 +572,7 @@ static const struct imc_uncore_pci_dev desktop_imc_pci_ids[] = {
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IMC_DEV(HSW_IMC, &hsw_uncore_pci_driver), /* 4th Gen Core Processor */
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IMC_DEV(HSW_IMC, &hsw_uncore_pci_driver), /* 4th Gen Core Processor */
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IMC_DEV(HSW_U_IMC, &hsw_uncore_pci_driver), /* 4th Gen Core ULT Mobile Processor */
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IMC_DEV(HSW_U_IMC, &hsw_uncore_pci_driver), /* 4th Gen Core ULT Mobile Processor */
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IMC_DEV(BDW_IMC, &bdw_uncore_pci_driver), /* 5th Gen Core U */
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IMC_DEV(BDW_IMC, &bdw_uncore_pci_driver), /* 5th Gen Core U */
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IMC_DEV(SKL_IMC, &skl_uncore_pci_driver), /* 6th Gen Core */
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{ /* end marker */ }
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{ /* end marker */ }
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};
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};
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@ -610,6 +625,11 @@ int bdw_uncore_pci_init(void)
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return imc_uncore_pci_init();
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return imc_uncore_pci_init();
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}
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}
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int skl_uncore_pci_init(void)
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{
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return imc_uncore_pci_init();
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}
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/* end of Sandy Bridge uncore support */
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/* end of Sandy Bridge uncore support */
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/* Nehalem uncore support */
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/* Nehalem uncore support */
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