i.MX SoC update for 5.5:
- Add arm64 Kconfig option for the NXP S32 platform.
- Drop imx_anatop_usb_chrg_detect_disable() function which becomes
unneeded, since all the necessary charger setup is done by the USB
PHY driver now.
- Add serial number support for i.MX6/7 SoCs by reading 64-bit SoC
unique ID from OCOTP block.
- Replace i.MX machine specific coherency exit implementation using
the generic v7_exit_coherency_flush() function.
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Merge tag 'imx-soc-5.5' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/soc
i.MX SoC update for 5.5:
- Add arm64 Kconfig option for the NXP S32 platform.
- Drop imx_anatop_usb_chrg_detect_disable() function which becomes
unneeded, since all the necessary charger setup is done by the USB
PHY driver now.
- Add serial number support for i.MX6/7 SoCs by reading 64-bit SoC
unique ID from OCOTP block.
- Replace i.MX machine specific coherency exit implementation using
the generic v7_exit_coherency_flush() function.
* tag 'imx-soc-5.5' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
ARM: imx: use generic function to exit coherency
ARM: imx: Add serial number support for i.MX6/7 SoCs
ARM: imx: Drop imx_anatop_usb_chrg_detect_disable()
arm64: Introduce config for S32
Link: https://lore.kernel.org/r/20191105150315.15477-2-shawnguo@kernel.org
Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson
commit
0f3dac6110
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@ -19,8 +19,6 @@
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#define ANADIG_REG_2P5 0x130
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#define ANADIG_REG_CORE 0x140
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#define ANADIG_ANA_MISC0 0x150
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#define ANADIG_USB1_CHRG_DETECT 0x1b0
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#define ANADIG_USB2_CHRG_DETECT 0x210
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#define ANADIG_DIGPROG 0x260
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#define ANADIG_DIGPROG_IMX6SL 0x280
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#define ANADIG_DIGPROG_IMX7D 0x800
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@ -33,8 +31,6 @@
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#define BM_ANADIG_ANA_MISC0_STOP_MODE_CONFIG 0x1000
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/* Below MISC0_DISCON_HIGH_SNVS is only for i.MX6SL */
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#define BM_ANADIG_ANA_MISC0_DISCON_HIGH_SNVS 0x2000
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#define BM_ANADIG_USB_CHRG_DETECT_CHK_CHRG_B 0x80000
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#define BM_ANADIG_USB_CHRG_DETECT_EN_B 0x100000
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static struct regmap *anatop;
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@ -96,16 +92,6 @@ void imx_anatop_post_resume(void)
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}
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static void imx_anatop_usb_chrg_detect_disable(void)
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{
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regmap_write(anatop, ANADIG_USB1_CHRG_DETECT,
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BM_ANADIG_USB_CHRG_DETECT_EN_B
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| BM_ANADIG_USB_CHRG_DETECT_CHK_CHRG_B);
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regmap_write(anatop, ANADIG_USB2_CHRG_DETECT,
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BM_ANADIG_USB_CHRG_DETECT_EN_B |
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BM_ANADIG_USB_CHRG_DETECT_CHK_CHRG_B);
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}
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void __init imx_init_revision_from_anatop(void)
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{
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struct device_node *np;
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@ -171,10 +157,6 @@ void __init imx_init_revision_from_anatop(void)
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void __init imx_anatop_init(void)
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{
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anatop = syscon_regmap_lookup_by_compatible("fsl,imx6q-anatop");
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if (IS_ERR(anatop)) {
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if (IS_ERR(anatop))
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pr_err("%s: failed to find imx6q-anatop regmap!\n", __func__);
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return;
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}
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imx_anatop_usb_chrg_detect_disable();
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}
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@ -1,15 +1,20 @@
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// SPDX-License-Identifier: GPL-2.0
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#include <linux/err.h>
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#include <linux/mfd/syscon.h>
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#include <linux/module.h>
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#include <linux/io.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <linux/regmap.h>
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#include <linux/slab.h>
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#include <linux/sys_soc.h>
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#include "hardware.h"
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#include "common.h"
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#define OCOTP_UID_H 0x420
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#define OCOTP_UID_L 0x410
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unsigned int __mxc_cpu_type;
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static unsigned int imx_soc_revision;
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@ -76,9 +81,13 @@ void __init imx_aips_allow_unprivileged_access(
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struct device * __init imx_soc_device_init(void)
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{
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struct soc_device_attribute *soc_dev_attr;
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const char *ocotp_compat = NULL;
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struct soc_device *soc_dev;
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struct device_node *root;
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struct regmap *ocotp;
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const char *soc_id;
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u64 soc_uid = 0;
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u32 val;
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int ret;
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soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL);
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@ -119,30 +128,39 @@ struct device * __init imx_soc_device_init(void)
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soc_id = "i.MX53";
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break;
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case MXC_CPU_IMX6SL:
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ocotp_compat = "fsl,imx6sl-ocotp";
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soc_id = "i.MX6SL";
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break;
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case MXC_CPU_IMX6DL:
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ocotp_compat = "fsl,imx6q-ocotp";
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soc_id = "i.MX6DL";
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break;
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case MXC_CPU_IMX6SX:
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ocotp_compat = "fsl,imx6sx-ocotp";
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soc_id = "i.MX6SX";
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break;
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case MXC_CPU_IMX6Q:
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ocotp_compat = "fsl,imx6q-ocotp";
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soc_id = "i.MX6Q";
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break;
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case MXC_CPU_IMX6UL:
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ocotp_compat = "fsl,imx6ul-ocotp";
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soc_id = "i.MX6UL";
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break;
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case MXC_CPU_IMX6ULL:
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ocotp_compat = "fsl,imx6ul-ocotp";
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soc_id = "i.MX6ULL";
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break;
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case MXC_CPU_IMX6ULZ:
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ocotp_compat = "fsl,imx6ul-ocotp";
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soc_id = "i.MX6ULZ";
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break;
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case MXC_CPU_IMX6SLL:
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ocotp_compat = "fsl,imx6sll-ocotp";
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soc_id = "i.MX6SLL";
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break;
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case MXC_CPU_IMX7D:
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ocotp_compat = "fsl,imx7d-ocotp";
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soc_id = "i.MX7D";
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break;
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case MXC_CPU_IMX7ULP:
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@ -153,18 +171,36 @@ struct device * __init imx_soc_device_init(void)
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}
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soc_dev_attr->soc_id = soc_id;
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if (ocotp_compat) {
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ocotp = syscon_regmap_lookup_by_compatible(ocotp_compat);
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if (IS_ERR(ocotp))
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pr_err("%s: failed to find %s regmap!\n", __func__, ocotp_compat);
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regmap_read(ocotp, OCOTP_UID_H, &val);
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soc_uid = val;
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regmap_read(ocotp, OCOTP_UID_L, &val);
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soc_uid <<= 32;
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soc_uid |= val;
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}
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soc_dev_attr->revision = kasprintf(GFP_KERNEL, "%d.%d",
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(imx_soc_revision >> 4) & 0xf,
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imx_soc_revision & 0xf);
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if (!soc_dev_attr->revision)
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goto free_soc;
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soc_dev_attr->serial_number = kasprintf(GFP_KERNEL, "%016llX", soc_uid);
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if (!soc_dev_attr->serial_number)
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goto free_rev;
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soc_dev = soc_device_register(soc_dev_attr);
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if (IS_ERR(soc_dev))
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goto free_rev;
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goto free_serial_number;
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return soc_device_to_device(soc_dev);
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free_serial_number:
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kfree(soc_dev_attr->serial_number);
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free_rev:
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kfree(soc_dev_attr->revision);
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free_soc:
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@ -6,32 +6,12 @@
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#include <linux/errno.h>
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#include <linux/jiffies.h>
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#include <asm/cacheflush.h>
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#include <asm/cp15.h>
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#include <asm/proc-fns.h>
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#include "common.h"
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static inline void cpu_enter_lowpower(void)
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{
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unsigned int v;
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asm volatile(
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"mcr p15, 0, %1, c7, c5, 0\n"
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" mcr p15, 0, %1, c7, c10, 4\n"
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/*
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* Turn off coherency
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*/
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" mrc p15, 0, %0, c1, c0, 1\n"
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" bic %0, %0, %3\n"
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" mcr p15, 0, %0, c1, c0, 1\n"
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" mrc p15, 0, %0, c1, c0, 0\n"
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" bic %0, %0, %2\n"
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" mcr p15, 0, %0, c1, c0, 0\n"
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: "=&r" (v)
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: "r" (0), "Ir" (CR_C), "Ir" (0x40)
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: "cc");
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}
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/*
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* platform-specific code to shutdown a CPU
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*
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@ -39,7 +19,7 @@ static inline void cpu_enter_lowpower(void)
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*/
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void imx_cpu_die(unsigned int cpu)
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{
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cpu_enter_lowpower();
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v7_exit_coherency_flush(louis);
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/*
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* We use the cpu jumping argument register to sync with
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* imx_cpu_kill() which is running on cpu0 and waiting for
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@ -214,6 +214,11 @@ config ARCH_ROCKCHIP
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This enables support for the ARMv8 based Rockchip chipsets,
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like the RK3368.
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config ARCH_S32
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bool "NXP S32 SoC Family"
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help
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This enables support for the NXP S32 family of processors.
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config ARCH_SEATTLE
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bool "AMD Seattle SoC Family"
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help
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Loading…
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