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iwl3945: Getting rid of iwl3945_eeprom_channel
The corresponding iwl structure is identical. Signed-off-by: Samuel Ortiz <samuel.ortiz@intel.com> Signed-off-by: Abhijeet Kolekar <abhijeet.kolekar@intel.com> Signed-off-by: Reinette Chatre <reinette.chatre@intel.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
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3 changed files with 11 additions and 56 deletions
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@ -69,6 +69,8 @@
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#ifndef __iwl_3945_hw__
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#define __iwl_3945_hw__
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#include "iwl-eeprom.h"
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/*
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* uCode queue management definitions ...
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* Queue #4 is the command queue for 3945 and 4965.
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@ -85,55 +87,8 @@
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/*
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* EEPROM related constants, enums, and structures.
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*/
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/*
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* EEPROM access time values:
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*
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* Driver initiates EEPROM read by writing byte address << 1 to CSR_EEPROM_REG,
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* then clearing (with subsequent read/modify/write) CSR_EEPROM_REG bit
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* CSR_EEPROM_REG_BIT_CMD (0x2).
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* Driver then polls CSR_EEPROM_REG for CSR_EEPROM_REG_READ_VALID_MSK (0x1).
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* When polling, wait 10 uSec between polling loops, up to a maximum 5000 uSec.
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* Driver reads 16-bit value from bits 31-16 of CSR_EEPROM_REG.
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*/
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#define IWL_EEPROM_ACCESS_TIMEOUT 5000 /* uSec */
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/*
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* Regulatory channel usage flags in EEPROM struct iwl_eeprom_channel.flags.
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*
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* IBSS and/or AP operation is allowed *only* on those channels with
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* (VALID && IBSS && ACTIVE && !RADAR). This restriction is in place because
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* RADAR detection is not supported by the 3945 driver, but is a
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* requirement for establishing a new network for legal operation on channels
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* requiring RADAR detection or restricting ACTIVE scanning.
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*
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* NOTE: "WIDE" flag indicates that 20 MHz channel is supported;
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* 3945 does not support FAT 40 MHz-wide channels.
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*
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* NOTE: Using a channel inappropriately will result in a uCode error!
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*/
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enum {
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EEPROM_CHANNEL_VALID = (1 << 0), /* usable for this SKU/geo */
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EEPROM_CHANNEL_IBSS = (1 << 1), /* usable as an IBSS channel */
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/* Bit 2 Reserved */
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EEPROM_CHANNEL_ACTIVE = (1 << 3), /* active scanning allowed */
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EEPROM_CHANNEL_RADAR = (1 << 4), /* radar detection required */
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EEPROM_CHANNEL_WIDE = (1 << 5), /* 20 MHz channel okay */
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/* Bit 6 Reserved (was Narrow Channel) */
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EEPROM_CHANNEL_DFS = (1 << 7), /* dynamic freq selection candidate */
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};
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/* SKU Capabilities */
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#define EEPROM_SKU_CAP_SW_RF_KILL_ENABLE (1 << 0)
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#define EEPROM_SKU_CAP_HW_RF_KILL_ENABLE (1 << 1)
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#define EEPROM_SKU_CAP_OP_MODE_MRC (1 << 7)
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/* *regulatory* channel data from eeprom, one for each channel */
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struct iwl3945_eeprom_channel {
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u8 flags; /* flags copied from EEPROM */
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s8 max_power_avg; /* max power (dBm) on this chnl, limit 31 */
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} __attribute__ ((packed));
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/*
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* Mapping of a Tx power level, at factory calibration temperature,
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* to a radio/DSP gain table index.
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@ -227,7 +182,7 @@ struct iwl3945_eeprom {
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* 2.4 GHz channels 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
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*/
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u16 band_1_count; /* abs.ofs: 196 */
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struct iwl3945_eeprom_channel band_1_channels[14]; /* abs.ofs: 196 */
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struct iwl_eeprom_channel band_1_channels[14]; /* abs.ofs: 196 */
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/*
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* 4.9 GHz channels 183, 184, 185, 187, 188, 189, 192, 196,
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@ -235,28 +190,28 @@ struct iwl3945_eeprom {
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* (4915-5080MHz) (none of these is ever supported)
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*/
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u16 band_2_count; /* abs.ofs: 226 */
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struct iwl3945_eeprom_channel band_2_channels[13]; /* abs.ofs: 228 */
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struct iwl_eeprom_channel band_2_channels[13]; /* abs.ofs: 228 */
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/*
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* 5.2 GHz channels 34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64
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* (5170-5320MHz)
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*/
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u16 band_3_count; /* abs.ofs: 254 */
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struct iwl3945_eeprom_channel band_3_channels[12]; /* abs.ofs: 256 */
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struct iwl_eeprom_channel band_3_channels[12]; /* abs.ofs: 256 */
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/*
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* 5.5 GHz channels 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140
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* (5500-5700MHz)
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*/
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u16 band_4_count; /* abs.ofs: 280 */
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struct iwl3945_eeprom_channel band_4_channels[11]; /* abs.ofs: 282 */
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struct iwl_eeprom_channel band_4_channels[11]; /* abs.ofs: 282 */
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/*
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* 5.7 GHz channels 145, 149, 153, 157, 161, 165
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* (5725-5825MHz)
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*/
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u16 band_5_count; /* abs.ofs: 304 */
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struct iwl3945_eeprom_channel band_5_channels[6]; /* abs.ofs: 306 */
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struct iwl_eeprom_channel band_5_channels[6]; /* abs.ofs: 306 */
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u8 reserved9[194];
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@ -203,8 +203,8 @@ struct iwl3945_scan_power_info {
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struct iwl3945_channel_info {
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struct iwl3945_channel_tgd_info tgd;
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struct iwl3945_channel_tgh_info tgh;
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struct iwl3945_eeprom_channel eeprom; /* EEPROM regulatory limit */
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struct iwl3945_eeprom_channel fat_eeprom; /* EEPROM regulatory limit for
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struct iwl_eeprom_channel eeprom; /* EEPROM regulatory limit */
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struct iwl_eeprom_channel fat_eeprom; /* EEPROM regulatory limit for
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* FAT channel */
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u8 channel; /* channel number */
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@ -4483,7 +4483,7 @@ static const u8 iwl3945_eeprom_band_5[] = { /* 5725-5825MHz */
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static void iwl3945_init_band_reference(const struct iwl3945_priv *priv, int band,
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int *eeprom_ch_count,
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const struct iwl3945_eeprom_channel
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const struct iwl_eeprom_channel
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**eeprom_ch_info,
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const u8 **eeprom_ch_index)
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{
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@ -4558,7 +4558,7 @@ static int iwl3945_init_channel_map(struct iwl3945_priv *priv)
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{
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int eeprom_ch_count = 0;
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const u8 *eeprom_ch_index = NULL;
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const struct iwl3945_eeprom_channel *eeprom_ch_info = NULL;
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const struct iwl_eeprom_channel *eeprom_ch_info = NULL;
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int band, ch;
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struct iwl3945_channel_info *ch_info;
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