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powerpc: Add initial e6500 cpu support
Add basic support for e6500 core in its single threaded mode. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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f0b8b3417d
commit
10241842fb
2 changed files with 26 additions and 4 deletions
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@ -390,6 +390,10 @@ extern const char *powerpc_base_platform;
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CPU_FTR_L2CSR | CPU_FTR_LWSYNC | CPU_FTR_NOEXECUTE | \
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CPU_FTR_DBELL | CPU_FTR_POPCNTB | CPU_FTR_POPCNTD | \
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CPU_FTR_DEBUG_LVL_EXC)
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#define CPU_FTRS_E6500 (CPU_FTR_USE_TB | CPU_FTR_NODSISRALIGN | \
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CPU_FTR_L2CSR | CPU_FTR_LWSYNC | CPU_FTR_NOEXECUTE | \
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CPU_FTR_DBELL | CPU_FTR_POPCNTB | CPU_FTR_POPCNTD | \
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CPU_FTR_DEBUG_LVL_EXC)
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#define CPU_FTRS_GENERIC_32 (CPU_FTR_COMMON | CPU_FTR_NODSISRALIGN)
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/* 64-bit CPUs */
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@ -442,7 +446,7 @@ extern const char *powerpc_base_platform;
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#ifdef __powerpc64__
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#ifdef CONFIG_PPC_BOOK3E
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#define CPU_FTRS_POSSIBLE (CPU_FTRS_E5500 | CPU_FTRS_A2)
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#define CPU_FTRS_POSSIBLE (CPU_FTRS_E6500 | CPU_FTRS_E5500 | CPU_FTRS_A2)
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#else
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#define CPU_FTRS_POSSIBLE \
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(CPU_FTRS_POWER3 | CPU_FTRS_RS64 | CPU_FTRS_POWER4 | \
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@ -483,7 +487,7 @@ enum {
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#endif
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#ifdef CONFIG_E500
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CPU_FTRS_E500 | CPU_FTRS_E500_2 | CPU_FTRS_E500MC |
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CPU_FTRS_E5500 |
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CPU_FTRS_E5500 | CPU_FTRS_E6500 |
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#endif
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0,
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};
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@ -491,7 +495,7 @@ enum {
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#ifdef __powerpc64__
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#ifdef CONFIG_PPC_BOOK3E
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#define CPU_FTRS_ALWAYS (CPU_FTRS_E5500 & CPU_FTRS_A2)
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#define CPU_FTRS_ALWAYS (CPU_FTRS_E6500 & CPU_FTRS_E5500 & CPU_FTRS_A2)
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#else
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#define CPU_FTRS_ALWAYS \
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(CPU_FTRS_POWER3 & CPU_FTRS_RS64 & CPU_FTRS_POWER4 & \
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@ -528,7 +532,7 @@ enum {
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#endif
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#ifdef CONFIG_E500
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CPU_FTRS_E500 & CPU_FTRS_E500_2 & CPU_FTRS_E500MC &
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CPU_FTRS_E5500 &
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CPU_FTRS_E5500 & CPU_FTRS_E6500 &
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#endif
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CPU_FTRS_POSSIBLE,
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};
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@ -2019,6 +2019,24 @@ static struct cpu_spec __initdata cpu_specs[] = {
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.machine_check = machine_check_e500mc,
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.platform = "ppce5500",
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},
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{ /* e6500 */
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.pvr_mask = 0xffff0000,
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.pvr_value = 0x80400000,
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.cpu_name = "e6500",
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.cpu_features = CPU_FTRS_E6500,
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.cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
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.mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS |
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MMU_FTR_USE_TLBILX,
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.icache_bsize = 64,
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.dcache_bsize = 64,
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.num_pmcs = 4,
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.oprofile_cpu_type = "ppc/e6500",
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.oprofile_type = PPC_OPROFILE_FSL_EMB,
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.cpu_setup = __setup_cpu_e5500,
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.cpu_restore = __restore_cpu_e5500,
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.machine_check = machine_check_e500mc,
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.platform = "ppce6500",
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},
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#ifdef CONFIG_PPC32
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{ /* default match */
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.pvr_mask = 0x00000000,
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