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drm/i915: blow away userspace mappings before fence change
This aligns it with the other user of i915_gem_clear_fence_reg, which blows away the mapping before changing the fence reg. Only affects userspace if it races against itself when changing tiling parameters, i.e. behaviour is undefined, anyway. Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Eric Anholt <eric@anholt.net>
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2 changed files with 6 additions and 6 deletions
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@ -2544,6 +2544,12 @@ i915_gem_object_put_fence_reg(struct drm_gem_object *obj)
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if (obj_priv->fence_reg == I915_FENCE_REG_NONE)
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return 0;
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/* If we've changed tiling, GTT-mappings of the object
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* need to re-fault to ensure that the correct fence register
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* setup is in place.
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*/
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i915_gem_release_mmap(obj);
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/* On the i915, GPU access to tiled buffers is via a fence,
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* therefore we must wait for any outstanding access to complete
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* before clearing the fence.
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@ -371,12 +371,6 @@ i915_gem_set_tiling(struct drm_device *dev, void *data,
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goto err;
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}
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/* If we've changed tiling, GTT-mappings of the object
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* need to re-fault to ensure that the correct fence register
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* setup is in place.
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*/
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i915_gem_release_mmap(obj);
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obj_priv->tiling_mode = args->tiling_mode;
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obj_priv->stride = args->stride;
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}
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