mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-08-24 17:59:32 +00:00
Merge branch 'sh-pfc-for-v4.4' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel
This commit is contained in:
commit
10af309a86
25 changed files with 530 additions and 144 deletions
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@ -272,7 +272,7 @@ static int sh_pfc_get_config_reg(struct sh_pfc *pfc, u16 enum_id,
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static int sh_pfc_mark_to_enum(struct sh_pfc *pfc, u16 mark, int pos,
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u16 *enum_idp)
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{
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const u16 *data = pfc->info->gpio_data;
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const u16 *data = pfc->info->pinmux_data;
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unsigned int k;
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if (pos) {
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@ -280,7 +280,7 @@ static int sh_pfc_mark_to_enum(struct sh_pfc *pfc, u16 mark, int pos,
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return pos + 1;
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}
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for (k = 0; k < pfc->info->gpio_data_size; k++) {
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for (k = 0; k < pfc->info->pinmux_data_size; k++) {
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if (data[k] == mark) {
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*enum_idp = data[k + 1];
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return k + 1;
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@ -593,12 +593,6 @@ static int sh_pfc_remove(struct platform_device *pdev)
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}
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static const struct platform_device_id sh_pfc_id_table[] = {
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#ifdef CONFIG_PINCTRL_PFC_R8A7778
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{ "pfc-r8a7778", (kernel_ulong_t)&r8a7778_pinmux_info },
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#endif
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#ifdef CONFIG_PINCTRL_PFC_R8A7779
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{ "pfc-r8a7779", (kernel_ulong_t)&r8a7779_pinmux_info },
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#endif
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#ifdef CONFIG_PINCTRL_PFC_SH7203
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{ "pfc-sh7203", (kernel_ulong_t)&sh7203_pinmux_info },
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#endif
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@ -1706,6 +1706,6 @@ const struct sh_pfc_soc_info emev2_pinmux_info = {
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.cfg_regs = pinmux_config_regs,
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.gpio_data = pinmux_data,
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.gpio_data_size = ARRAY_SIZE(pinmux_data),
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.pinmux_data = pinmux_data,
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.pinmux_data_size = ARRAY_SIZE(pinmux_data),
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};
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@ -2734,11 +2734,11 @@ const struct sh_pfc_soc_info r8a73a4_pinmux_info = {
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.functions = pinmux_functions,
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.nr_functions = ARRAY_SIZE(pinmux_functions),
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.cfg_regs = pinmux_config_regs,
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.data_regs = pinmux_data_regs,
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.cfg_regs = pinmux_config_regs,
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.data_regs = pinmux_data_regs,
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.gpio_data = pinmux_data,
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.gpio_data_size = ARRAY_SIZE(pinmux_data),
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.pinmux_data = pinmux_data,
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.pinmux_data_size = ARRAY_SIZE(pinmux_data),
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.gpio_irq = pinmux_irqs,
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.gpio_irq_size = ARRAY_SIZE(pinmux_irqs),
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@ -3774,8 +3774,8 @@ const struct sh_pfc_soc_info r8a7740_pinmux_info = {
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.cfg_regs = pinmux_config_regs,
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.data_regs = pinmux_data_regs,
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.gpio_data = pinmux_data,
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.gpio_data_size = ARRAY_SIZE(pinmux_data),
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.pinmux_data = pinmux_data,
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.pinmux_data_size = ARRAY_SIZE(pinmux_data),
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.gpio_irq = pinmux_irqs,
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.gpio_irq_size = ARRAY_SIZE(pinmux_irqs),
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@ -4,6 +4,7 @@
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* Copyright (C) 2013 Renesas Solutions Corp.
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* Copyright (C) 2013 Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
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* Copyright (C) 2013 Cogent Embedded, Inc.
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* Copyright (C) 2015 Ulrich Hecht
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*
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* based on
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* Copyright (C) 2011 Renesas Solutions Corp.
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@ -19,32 +20,37 @@
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* GNU General Public License for more details.
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*/
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#include <linux/platform_data/gpio-rcar.h>
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#include <linux/io.h>
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#include <linux/kernel.h>
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#include <linux/pinctrl/pinconf-generic.h>
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#include "core.h"
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#include "sh_pfc.h"
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#define PORT_GP_27(bank, fn, sfx) \
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PORT_GP_1(bank, 0, fn, sfx), PORT_GP_1(bank, 1, fn, sfx), \
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PORT_GP_1(bank, 2, fn, sfx), PORT_GP_1(bank, 3, fn, sfx), \
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PORT_GP_1(bank, 4, fn, sfx), PORT_GP_1(bank, 5, fn, sfx), \
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PORT_GP_1(bank, 6, fn, sfx), PORT_GP_1(bank, 7, fn, sfx), \
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PORT_GP_1(bank, 8, fn, sfx), PORT_GP_1(bank, 9, fn, sfx), \
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PORT_GP_1(bank, 10, fn, sfx), PORT_GP_1(bank, 11, fn, sfx), \
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PORT_GP_1(bank, 12, fn, sfx), PORT_GP_1(bank, 13, fn, sfx), \
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PORT_GP_1(bank, 14, fn, sfx), PORT_GP_1(bank, 15, fn, sfx), \
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PORT_GP_1(bank, 16, fn, sfx), PORT_GP_1(bank, 17, fn, sfx), \
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PORT_GP_1(bank, 18, fn, sfx), PORT_GP_1(bank, 19, fn, sfx), \
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PORT_GP_1(bank, 20, fn, sfx), PORT_GP_1(bank, 21, fn, sfx), \
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PORT_GP_1(bank, 22, fn, sfx), PORT_GP_1(bank, 23, fn, sfx), \
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PORT_GP_1(bank, 24, fn, sfx), PORT_GP_1(bank, 25, fn, sfx), \
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PORT_GP_1(bank, 26, fn, sfx)
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#define PORT_GP_PUP_1(bank, pin, fn, sfx) \
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PORT_GP_CFG_1(bank, pin, fn, sfx, SH_PFC_PIN_CFG_PULL_UP)
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#define PORT_GP_PUP_27(bank, fn, sfx) \
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PORT_GP_PUP_1(bank, 0, fn, sfx), PORT_GP_PUP_1(bank, 1, fn, sfx), \
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PORT_GP_PUP_1(bank, 2, fn, sfx), PORT_GP_PUP_1(bank, 3, fn, sfx), \
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PORT_GP_PUP_1(bank, 4, fn, sfx), PORT_GP_PUP_1(bank, 5, fn, sfx), \
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PORT_GP_PUP_1(bank, 6, fn, sfx), PORT_GP_PUP_1(bank, 7, fn, sfx), \
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PORT_GP_PUP_1(bank, 8, fn, sfx), PORT_GP_PUP_1(bank, 9, fn, sfx), \
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PORT_GP_PUP_1(bank, 10, fn, sfx), PORT_GP_PUP_1(bank, 11, fn, sfx), \
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PORT_GP_PUP_1(bank, 12, fn, sfx), PORT_GP_PUP_1(bank, 13, fn, sfx), \
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PORT_GP_PUP_1(bank, 14, fn, sfx), PORT_GP_PUP_1(bank, 15, fn, sfx), \
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PORT_GP_PUP_1(bank, 16, fn, sfx), PORT_GP_PUP_1(bank, 17, fn, sfx), \
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PORT_GP_PUP_1(bank, 18, fn, sfx), PORT_GP_PUP_1(bank, 19, fn, sfx), \
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PORT_GP_PUP_1(bank, 20, fn, sfx), PORT_GP_PUP_1(bank, 21, fn, sfx), \
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PORT_GP_PUP_1(bank, 22, fn, sfx), PORT_GP_PUP_1(bank, 23, fn, sfx), \
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PORT_GP_PUP_1(bank, 24, fn, sfx), PORT_GP_PUP_1(bank, 25, fn, sfx), \
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PORT_GP_PUP_1(bank, 26, fn, sfx)
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#define CPU_ALL_PORT(fn, sfx) \
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PORT_GP_32(0, fn, sfx), \
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PORT_GP_32(1, fn, sfx), \
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PORT_GP_32(2, fn, sfx), \
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PORT_GP_32(3, fn, sfx), \
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PORT_GP_27(4, fn, sfx)
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PORT_GP_CFG_32(0, fn, sfx, SH_PFC_PIN_CFG_PULL_UP), \
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PORT_GP_CFG_32(1, fn, sfx, SH_PFC_PIN_CFG_PULL_UP), \
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PORT_GP_CFG_32(2, fn, sfx, SH_PFC_PIN_CFG_PULL_UP), \
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PORT_GP_CFG_32(3, fn, sfx, SH_PFC_PIN_CFG_PULL_UP), \
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PORT_GP_PUP_27(4, fn, sfx)
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enum {
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PINMUX_RESERVED = 0,
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@ -2905,8 +2911,222 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = {
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{ },
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};
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#define PUPR0 0x100
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#define PUPR1 0x104
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#define PUPR2 0x108
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#define PUPR3 0x10c
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#define PUPR4 0x110
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#define PUPR5 0x114
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static const struct {
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u16 reg : 11;
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u16 bit : 5;
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} pullups[] = {
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[RCAR_GP_PIN(0, 6)] = { PUPR0, 0 }, /* A0 */
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[RCAR_GP_PIN(0, 7)] = { PUPR0, 1 }, /* A1 */
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[RCAR_GP_PIN(0, 8)] = { PUPR0, 2 }, /* A2 */
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[RCAR_GP_PIN(0, 9)] = { PUPR0, 3 }, /* A3 */
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[RCAR_GP_PIN(0, 10)] = { PUPR0, 4 }, /* A4 */
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[RCAR_GP_PIN(0, 11)] = { PUPR0, 5 }, /* A5 */
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[RCAR_GP_PIN(0, 12)] = { PUPR0, 6 }, /* A6 */
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[RCAR_GP_PIN(0, 13)] = { PUPR0, 7 }, /* A7 */
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[RCAR_GP_PIN(0, 14)] = { PUPR0, 8 }, /* A8 */
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[RCAR_GP_PIN(0, 15)] = { PUPR0, 9 }, /* A9 */
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[RCAR_GP_PIN(0, 16)] = { PUPR0, 10 }, /* A10 */
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[RCAR_GP_PIN(0, 17)] = { PUPR0, 11 }, /* A11 */
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[RCAR_GP_PIN(0, 18)] = { PUPR0, 12 }, /* A12 */
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[RCAR_GP_PIN(0, 19)] = { PUPR0, 13 }, /* A13 */
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[RCAR_GP_PIN(0, 20)] = { PUPR0, 14 }, /* A14 */
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[RCAR_GP_PIN(0, 21)] = { PUPR0, 15 }, /* A15 */
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[RCAR_GP_PIN(0, 22)] = { PUPR0, 16 }, /* A16 */
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[RCAR_GP_PIN(0, 23)] = { PUPR0, 17 }, /* A17 */
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[RCAR_GP_PIN(0, 24)] = { PUPR0, 18 }, /* A18 */
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[RCAR_GP_PIN(0, 25)] = { PUPR0, 19 }, /* A19 */
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[RCAR_GP_PIN(0, 26)] = { PUPR0, 20 }, /* A20 */
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[RCAR_GP_PIN(0, 27)] = { PUPR0, 21 }, /* A21 */
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[RCAR_GP_PIN(0, 28)] = { PUPR0, 22 }, /* A22 */
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[RCAR_GP_PIN(0, 29)] = { PUPR0, 23 }, /* A23 */
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[RCAR_GP_PIN(0, 30)] = { PUPR0, 24 }, /* A24 */
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[RCAR_GP_PIN(0, 31)] = { PUPR0, 25 }, /* A25 */
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[RCAR_GP_PIN(1, 3)] = { PUPR0, 26 }, /* /EX_CS0 */
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[RCAR_GP_PIN(1, 4)] = { PUPR0, 27 }, /* /EX_CS1 */
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[RCAR_GP_PIN(1, 5)] = { PUPR0, 28 }, /* /EX_CS2 */
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[RCAR_GP_PIN(1, 6)] = { PUPR0, 29 }, /* /EX_CS3 */
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[RCAR_GP_PIN(1, 7)] = { PUPR0, 30 }, /* /EX_CS4 */
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[RCAR_GP_PIN(1, 8)] = { PUPR0, 31 }, /* /EX_CS5 */
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[RCAR_GP_PIN(0, 0)] = { PUPR1, 0 }, /* /PRESETOUT */
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[RCAR_GP_PIN(0, 5)] = { PUPR1, 1 }, /* /BS */
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[RCAR_GP_PIN(1, 0)] = { PUPR1, 2 }, /* RD//WR */
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[RCAR_GP_PIN(1, 1)] = { PUPR1, 3 }, /* /WE0 */
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[RCAR_GP_PIN(1, 2)] = { PUPR1, 4 }, /* /WE1 */
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[RCAR_GP_PIN(1, 11)] = { PUPR1, 5 }, /* EX_WAIT0 */
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[RCAR_GP_PIN(1, 9)] = { PUPR1, 6 }, /* DREQ0 */
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[RCAR_GP_PIN(1, 10)] = { PUPR1, 7 }, /* DACK0 */
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[RCAR_GP_PIN(1, 12)] = { PUPR1, 8 }, /* IRQ0 */
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[RCAR_GP_PIN(1, 13)] = { PUPR1, 9 }, /* IRQ1 */
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[RCAR_GP_PIN(1, 22)] = { PUPR2, 0 }, /* DU0_DR0 */
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[RCAR_GP_PIN(1, 23)] = { PUPR2, 1 }, /* DU0_DR1 */
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[RCAR_GP_PIN(1, 24)] = { PUPR2, 2 }, /* DU0_DR2 */
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[RCAR_GP_PIN(1, 25)] = { PUPR2, 3 }, /* DU0_DR3 */
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[RCAR_GP_PIN(1, 26)] = { PUPR2, 4 }, /* DU0_DR4 */
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[RCAR_GP_PIN(1, 27)] = { PUPR2, 5 }, /* DU0_DR5 */
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[RCAR_GP_PIN(1, 28)] = { PUPR2, 6 }, /* DU0_DR6 */
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[RCAR_GP_PIN(1, 29)] = { PUPR2, 7 }, /* DU0_DR7 */
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[RCAR_GP_PIN(1, 30)] = { PUPR2, 8 }, /* DU0_DG0 */
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[RCAR_GP_PIN(1, 31)] = { PUPR2, 9 }, /* DU0_DG1 */
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[RCAR_GP_PIN(2, 0)] = { PUPR2, 10 }, /* DU0_DG2 */
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[RCAR_GP_PIN(2, 1)] = { PUPR2, 11 }, /* DU0_DG3 */
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[RCAR_GP_PIN(2, 2)] = { PUPR2, 12 }, /* DU0_DG4 */
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[RCAR_GP_PIN(2, 3)] = { PUPR2, 13 }, /* DU0_DG5 */
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[RCAR_GP_PIN(2, 4)] = { PUPR2, 14 }, /* DU0_DG6 */
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[RCAR_GP_PIN(2, 5)] = { PUPR2, 15 }, /* DU0_DG7 */
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[RCAR_GP_PIN(2, 6)] = { PUPR2, 16 }, /* DU0_DB0 */
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[RCAR_GP_PIN(2, 7)] = { PUPR2, 17 }, /* DU0_DB1 */
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[RCAR_GP_PIN(2, 8)] = { PUPR2, 18 }, /* DU0_DB2 */
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[RCAR_GP_PIN(2, 9)] = { PUPR2, 19 }, /* DU0_DB3 */
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[RCAR_GP_PIN(2, 10)] = { PUPR2, 20 }, /* DU0_DB4 */
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[RCAR_GP_PIN(2, 11)] = { PUPR2, 21 }, /* DU0_DB5 */
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[RCAR_GP_PIN(2, 12)] = { PUPR2, 22 }, /* DU0_DB6 */
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[RCAR_GP_PIN(2, 13)] = { PUPR2, 23 }, /* DU0_DB7 */
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[RCAR_GP_PIN(2, 14)] = { PUPR2, 24 }, /* DU0_DOTCLKIN */
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[RCAR_GP_PIN(2, 15)] = { PUPR2, 25 }, /* DU0_DOTCLKOUT0 */
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[RCAR_GP_PIN(2, 17)] = { PUPR2, 26 }, /* DU0_HSYNC */
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[RCAR_GP_PIN(2, 18)] = { PUPR2, 27 }, /* DU0_VSYNC */
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[RCAR_GP_PIN(2, 19)] = { PUPR2, 28 }, /* DU0_EXODDF */
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[RCAR_GP_PIN(2, 20)] = { PUPR2, 29 }, /* DU0_DISP */
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[RCAR_GP_PIN(2, 21)] = { PUPR2, 30 }, /* DU0_CDE */
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[RCAR_GP_PIN(2, 16)] = { PUPR2, 31 }, /* DU0_DOTCLKOUT1 */
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[RCAR_GP_PIN(3, 24)] = { PUPR3, 0 }, /* VI0_CLK */
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[RCAR_GP_PIN(3, 25)] = { PUPR3, 1 }, /* VI0_CLKENB */
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[RCAR_GP_PIN(3, 26)] = { PUPR3, 2 }, /* VI0_FIELD */
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[RCAR_GP_PIN(3, 27)] = { PUPR3, 3 }, /* /VI0_HSYNC */
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[RCAR_GP_PIN(3, 28)] = { PUPR3, 4 }, /* /VI0_VSYNC */
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[RCAR_GP_PIN(3, 29)] = { PUPR3, 5 }, /* VI0_DATA0 */
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[RCAR_GP_PIN(3, 30)] = { PUPR3, 6 }, /* VI0_DATA1 */
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[RCAR_GP_PIN(3, 31)] = { PUPR3, 7 }, /* VI0_DATA2 */
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[RCAR_GP_PIN(4, 0)] = { PUPR3, 8 }, /* VI0_DATA3 */
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[RCAR_GP_PIN(4, 1)] = { PUPR3, 9 }, /* VI0_DATA4 */
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[RCAR_GP_PIN(4, 2)] = { PUPR3, 10 }, /* VI0_DATA5 */
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[RCAR_GP_PIN(4, 3)] = { PUPR3, 11 }, /* VI0_DATA6 */
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[RCAR_GP_PIN(4, 4)] = { PUPR3, 12 }, /* VI0_DATA7 */
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[RCAR_GP_PIN(4, 5)] = { PUPR3, 13 }, /* VI0_G2 */
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[RCAR_GP_PIN(4, 6)] = { PUPR3, 14 }, /* VI0_G3 */
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[RCAR_GP_PIN(4, 7)] = { PUPR3, 15 }, /* VI0_G4 */
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[RCAR_GP_PIN(4, 8)] = { PUPR3, 16 }, /* VI0_G5 */
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[RCAR_GP_PIN(4, 21)] = { PUPR3, 17 }, /* VI1_DATA12 */
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[RCAR_GP_PIN(4, 22)] = { PUPR3, 18 }, /* VI1_DATA13 */
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[RCAR_GP_PIN(4, 23)] = { PUPR3, 19 }, /* VI1_DATA14 */
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[RCAR_GP_PIN(4, 24)] = { PUPR3, 20 }, /* VI1_DATA15 */
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[RCAR_GP_PIN(4, 9)] = { PUPR3, 21 }, /* ETH_REF_CLK */
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[RCAR_GP_PIN(4, 10)] = { PUPR3, 22 }, /* ETH_TXD0 */
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[RCAR_GP_PIN(4, 11)] = { PUPR3, 23 }, /* ETH_TXD1 */
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[RCAR_GP_PIN(4, 12)] = { PUPR3, 24 }, /* ETH_CRS_DV */
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[RCAR_GP_PIN(4, 13)] = { PUPR3, 25 }, /* ETH_TX_EN */
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[RCAR_GP_PIN(4, 14)] = { PUPR3, 26 }, /* ETH_RX_ER */
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[RCAR_GP_PIN(4, 15)] = { PUPR3, 27 }, /* ETH_RXD0 */
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[RCAR_GP_PIN(4, 16)] = { PUPR3, 28 }, /* ETH_RXD1 */
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[RCAR_GP_PIN(4, 17)] = { PUPR3, 29 }, /* ETH_MDC */
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[RCAR_GP_PIN(4, 18)] = { PUPR3, 30 }, /* ETH_MDIO */
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[RCAR_GP_PIN(4, 19)] = { PUPR3, 31 }, /* ETH_LINK */
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[RCAR_GP_PIN(3, 6)] = { PUPR4, 0 }, /* SSI_SCK012 */
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[RCAR_GP_PIN(3, 7)] = { PUPR4, 1 }, /* SSI_WS012 */
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[RCAR_GP_PIN(3, 10)] = { PUPR4, 2 }, /* SSI_SDATA0 */
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[RCAR_GP_PIN(3, 9)] = { PUPR4, 3 }, /* SSI_SDATA1 */
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[RCAR_GP_PIN(3, 8)] = { PUPR4, 4 }, /* SSI_SDATA2 */
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[RCAR_GP_PIN(3, 2)] = { PUPR4, 5 }, /* SSI_SCK34 */
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[RCAR_GP_PIN(3, 3)] = { PUPR4, 6 }, /* SSI_WS34 */
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[RCAR_GP_PIN(3, 5)] = { PUPR4, 7 }, /* SSI_SDATA3 */
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[RCAR_GP_PIN(3, 4)] = { PUPR4, 8 }, /* SSI_SDATA4 */
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[RCAR_GP_PIN(2, 31)] = { PUPR4, 9 }, /* SSI_SCK5 */
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[RCAR_GP_PIN(3, 0)] = { PUPR4, 10 }, /* SSI_WS5 */
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[RCAR_GP_PIN(3, 1)] = { PUPR4, 11 }, /* SSI_SDATA5 */
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[RCAR_GP_PIN(2, 28)] = { PUPR4, 12 }, /* SSI_SCK6 */
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[RCAR_GP_PIN(2, 29)] = { PUPR4, 13 }, /* SSI_WS6 */
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[RCAR_GP_PIN(2, 30)] = { PUPR4, 14 }, /* SSI_SDATA6 */
|
||||
[RCAR_GP_PIN(2, 24)] = { PUPR4, 15 }, /* SSI_SCK78 */
|
||||
[RCAR_GP_PIN(2, 25)] = { PUPR4, 16 }, /* SSI_WS78 */
|
||||
[RCAR_GP_PIN(2, 27)] = { PUPR4, 17 }, /* SSI_SDATA7 */
|
||||
[RCAR_GP_PIN(2, 26)] = { PUPR4, 18 }, /* SSI_SDATA8 */
|
||||
[RCAR_GP_PIN(3, 23)] = { PUPR4, 19 }, /* TCLK0 */
|
||||
[RCAR_GP_PIN(3, 11)] = { PUPR4, 20 }, /* SD0_CLK */
|
||||
[RCAR_GP_PIN(3, 12)] = { PUPR4, 21 }, /* SD0_CMD */
|
||||
[RCAR_GP_PIN(3, 13)] = { PUPR4, 22 }, /* SD0_DAT0 */
|
||||
[RCAR_GP_PIN(3, 14)] = { PUPR4, 23 }, /* SD0_DAT1 */
|
||||
[RCAR_GP_PIN(3, 15)] = { PUPR4, 24 }, /* SD0_DAT2 */
|
||||
[RCAR_GP_PIN(3, 16)] = { PUPR4, 25 }, /* SD0_DAT3 */
|
||||
[RCAR_GP_PIN(3, 17)] = { PUPR4, 26 }, /* SD0_CD */
|
||||
[RCAR_GP_PIN(3, 18)] = { PUPR4, 27 }, /* SD0_WP */
|
||||
[RCAR_GP_PIN(2, 22)] = { PUPR4, 28 }, /* AUDIO_CLKA */
|
||||
[RCAR_GP_PIN(2, 23)] = { PUPR4, 29 }, /* AUDIO_CLKB */
|
||||
[RCAR_GP_PIN(1, 14)] = { PUPR4, 30 }, /* IRQ2 */
|
||||
[RCAR_GP_PIN(1, 15)] = { PUPR4, 31 }, /* IRQ3 */
|
||||
|
||||
[RCAR_GP_PIN(0, 1)] = { PUPR5, 0 }, /* PENC0 */
|
||||
[RCAR_GP_PIN(0, 2)] = { PUPR5, 1 }, /* PENC1 */
|
||||
[RCAR_GP_PIN(0, 3)] = { PUPR5, 2 }, /* USB_OVC0 */
|
||||
[RCAR_GP_PIN(0, 4)] = { PUPR5, 3 }, /* USB_OVC1 */
|
||||
[RCAR_GP_PIN(1, 16)] = { PUPR5, 4 }, /* SCIF_CLK */
|
||||
[RCAR_GP_PIN(1, 17)] = { PUPR5, 5 }, /* TX0 */
|
||||
[RCAR_GP_PIN(1, 18)] = { PUPR5, 6 }, /* RX0 */
|
||||
[RCAR_GP_PIN(1, 19)] = { PUPR5, 7 }, /* SCK0 */
|
||||
[RCAR_GP_PIN(1, 20)] = { PUPR5, 8 }, /* /CTS0 */
|
||||
[RCAR_GP_PIN(1, 21)] = { PUPR5, 9 }, /* /RTS0 */
|
||||
[RCAR_GP_PIN(3, 19)] = { PUPR5, 10 }, /* HSPI_CLK0 */
|
||||
[RCAR_GP_PIN(3, 20)] = { PUPR5, 11 }, /* /HSPI_CS0 */
|
||||
[RCAR_GP_PIN(3, 21)] = { PUPR5, 12 }, /* HSPI_RX0 */
|
||||
[RCAR_GP_PIN(3, 22)] = { PUPR5, 13 }, /* HSPI_TX0 */
|
||||
[RCAR_GP_PIN(4, 20)] = { PUPR5, 14 }, /* ETH_MAGIC */
|
||||
[RCAR_GP_PIN(4, 25)] = { PUPR5, 15 }, /* AVS1 */
|
||||
[RCAR_GP_PIN(4, 26)] = { PUPR5, 16 }, /* AVS2 */
|
||||
};
|
||||
|
||||
static unsigned int r8a7778_pinmux_get_bias(struct sh_pfc *pfc,
|
||||
unsigned int pin)
|
||||
{
|
||||
void __iomem *addr;
|
||||
|
||||
if (WARN_ON_ONCE(!pullups[pin].reg))
|
||||
return PIN_CONFIG_BIAS_DISABLE;
|
||||
|
||||
addr = pfc->windows->virt + pullups[pin].reg;
|
||||
|
||||
if (ioread32(addr) & BIT(pullups[pin].bit))
|
||||
return PIN_CONFIG_BIAS_PULL_UP;
|
||||
else
|
||||
return PIN_CONFIG_BIAS_DISABLE;
|
||||
}
|
||||
|
||||
static void r8a7778_pinmux_set_bias(struct sh_pfc *pfc, unsigned int pin,
|
||||
unsigned int bias)
|
||||
{
|
||||
void __iomem *addr;
|
||||
u32 value;
|
||||
u32 bit;
|
||||
|
||||
if (WARN_ON_ONCE(!pullups[pin].reg))
|
||||
return;
|
||||
|
||||
addr = pfc->windows->virt + pullups[pin].reg;
|
||||
bit = BIT(pullups[pin].bit);
|
||||
|
||||
value = ioread32(addr) & ~bit;
|
||||
if (bias == PIN_CONFIG_BIAS_PULL_UP)
|
||||
value |= bit;
|
||||
iowrite32(value, addr);
|
||||
}
|
||||
|
||||
static const struct sh_pfc_soc_operations r8a7778_pfc_ops = {
|
||||
.get_bias = r8a7778_pinmux_get_bias,
|
||||
.set_bias = r8a7778_pinmux_set_bias,
|
||||
};
|
||||
|
||||
const struct sh_pfc_soc_info r8a7778_pinmux_info = {
|
||||
.name = "r8a7778_pfc",
|
||||
.ops = &r8a7778_pfc_ops,
|
||||
|
||||
.unlock_reg = 0xfffc0000, /* PMMR */
|
||||
|
||||
|
@ -2923,6 +3143,6 @@ const struct sh_pfc_soc_info r8a7778_pinmux_info = {
|
|||
|
||||
.cfg_regs = pinmux_config_regs,
|
||||
|
||||
.gpio_data = pinmux_data,
|
||||
.gpio_data_size = ARRAY_SIZE(pinmux_data),
|
||||
.pinmux_data = pinmux_data,
|
||||
.pinmux_data_size = ARRAY_SIZE(pinmux_data),
|
||||
};
|
||||
|
|
|
@ -20,7 +20,6 @@
|
|||
*/
|
||||
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/platform_data/gpio-rcar.h>
|
||||
|
||||
#include "sh_pfc.h"
|
||||
|
||||
|
@ -3868,6 +3867,6 @@ const struct sh_pfc_soc_info r8a7779_pinmux_info = {
|
|||
|
||||
.cfg_regs = pinmux_config_regs,
|
||||
|
||||
.gpio_data = pinmux_data,
|
||||
.gpio_data_size = ARRAY_SIZE(pinmux_data),
|
||||
.pinmux_data = pinmux_data,
|
||||
.pinmux_data_size = ARRAY_SIZE(pinmux_data),
|
||||
};
|
||||
|
|
|
@ -22,7 +22,6 @@
|
|||
*/
|
||||
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/platform_data/gpio-rcar.h>
|
||||
|
||||
#include "core.h"
|
||||
#include "sh_pfc.h"
|
||||
|
@ -3624,25 +3623,6 @@ static const unsigned int usb2_pins[] = {
|
|||
static const unsigned int usb2_mux[] = {
|
||||
USB2_PWEN_MARK, USB2_OVC_MARK,
|
||||
};
|
||||
|
||||
union vin_data {
|
||||
unsigned int data24[24];
|
||||
unsigned int data20[20];
|
||||
unsigned int data16[16];
|
||||
unsigned int data12[12];
|
||||
unsigned int data10[10];
|
||||
unsigned int data8[8];
|
||||
unsigned int data4[4];
|
||||
};
|
||||
|
||||
#define VIN_DATA_PIN_GROUP(n, s) \
|
||||
{ \
|
||||
.name = #n#s, \
|
||||
.pins = n##_pins.data##s, \
|
||||
.mux = n##_mux.data##s, \
|
||||
.nr_pins = ARRAY_SIZE(n##_pins.data##s), \
|
||||
}
|
||||
|
||||
/* - VIN0 ------------------------------------------------------------------- */
|
||||
static const union vin_data vin0_data_pins = {
|
||||
.data24 = {
|
||||
|
@ -5719,6 +5699,6 @@ const struct sh_pfc_soc_info r8a7790_pinmux_info = {
|
|||
|
||||
.cfg_regs = pinmux_config_regs,
|
||||
|
||||
.gpio_data = pinmux_data,
|
||||
.gpio_data_size = ARRAY_SIZE(pinmux_data),
|
||||
.pinmux_data = pinmux_data,
|
||||
.pinmux_data_size = ARRAY_SIZE(pinmux_data),
|
||||
};
|
||||
|
|
|
@ -9,7 +9,6 @@
|
|||
*/
|
||||
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/platform_data/gpio-rcar.h>
|
||||
|
||||
#include "core.h"
|
||||
#include "sh_pfc.h"
|
||||
|
@ -3986,24 +3985,6 @@ static const unsigned int usb1_mux[] = {
|
|||
USB1_PWEN_MARK,
|
||||
USB1_OVC_MARK,
|
||||
};
|
||||
|
||||
union vin_data {
|
||||
unsigned int data24[24];
|
||||
unsigned int data20[20];
|
||||
unsigned int data16[16];
|
||||
unsigned int data12[12];
|
||||
unsigned int data10[10];
|
||||
unsigned int data8[8];
|
||||
};
|
||||
|
||||
#define VIN_DATA_PIN_GROUP(n, s) \
|
||||
{ \
|
||||
.name = #n#s, \
|
||||
.pins = n##_pins.data##s, \
|
||||
.mux = n##_mux.data##s, \
|
||||
.nr_pins = ARRAY_SIZE(n##_pins.data##s), \
|
||||
}
|
||||
|
||||
/* - VIN0 ------------------------------------------------------------------- */
|
||||
static const union vin_data vin0_data_pins = {
|
||||
.data24 = {
|
||||
|
@ -6337,8 +6318,8 @@ const struct sh_pfc_soc_info r8a7791_pinmux_info = {
|
|||
|
||||
.cfg_regs = pinmux_config_regs,
|
||||
|
||||
.gpio_data = pinmux_data,
|
||||
.gpio_data_size = ARRAY_SIZE(pinmux_data),
|
||||
.pinmux_data = pinmux_data,
|
||||
.pinmux_data_size = ARRAY_SIZE(pinmux_data),
|
||||
};
|
||||
#endif
|
||||
|
||||
|
@ -6358,7 +6339,7 @@ const struct sh_pfc_soc_info r8a7793_pinmux_info = {
|
|||
|
||||
.cfg_regs = pinmux_config_regs,
|
||||
|
||||
.gpio_data = pinmux_data,
|
||||
.gpio_data_size = ARRAY_SIZE(pinmux_data),
|
||||
.pinmux_data = pinmux_data,
|
||||
.pinmux_data_size = ARRAY_SIZE(pinmux_data),
|
||||
};
|
||||
#endif
|
||||
|
|
|
@ -11,7 +11,6 @@
|
|||
*/
|
||||
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/platform_data/gpio-rcar.h>
|
||||
|
||||
#include "core.h"
|
||||
#include "sh_pfc.h"
|
||||
|
@ -2774,6 +2773,146 @@ static const unsigned int usb1_mux[] = {
|
|||
USB1_PWEN_MARK,
|
||||
USB1_OVC_MARK,
|
||||
};
|
||||
/* - VIN0 ------------------------------------------------------------------- */
|
||||
static const union vin_data vin0_data_pins = {
|
||||
.data24 = {
|
||||
/* B */
|
||||
RCAR_GP_PIN(3, 1), RCAR_GP_PIN(3, 2),
|
||||
RCAR_GP_PIN(3, 3), RCAR_GP_PIN(3, 4),
|
||||
RCAR_GP_PIN(3, 5), RCAR_GP_PIN(3, 6),
|
||||
RCAR_GP_PIN(3, 7), RCAR_GP_PIN(3, 8),
|
||||
/* G */
|
||||
RCAR_GP_PIN(3, 13), RCAR_GP_PIN(3, 14),
|
||||
RCAR_GP_PIN(3, 15), RCAR_GP_PIN(3, 16),
|
||||
RCAR_GP_PIN(3, 17), RCAR_GP_PIN(3, 18),
|
||||
RCAR_GP_PIN(3, 19), RCAR_GP_PIN(3, 20),
|
||||
/* R */
|
||||
RCAR_GP_PIN(3, 21), RCAR_GP_PIN(3, 22),
|
||||
RCAR_GP_PIN(3, 23), RCAR_GP_PIN(3, 24),
|
||||
RCAR_GP_PIN(3, 25), RCAR_GP_PIN(3, 26),
|
||||
RCAR_GP_PIN(3, 27), RCAR_GP_PIN(3, 28),
|
||||
},
|
||||
};
|
||||
static const union vin_data vin0_data_mux = {
|
||||
.data24 = {
|
||||
/* B */
|
||||
VI0_DATA0_VI0_B0_MARK, VI0_DATA1_VI0_B1_MARK,
|
||||
VI0_DATA2_VI0_B2_MARK, VI0_DATA3_VI0_B3_MARK,
|
||||
VI0_DATA4_VI0_B4_MARK, VI0_DATA5_VI0_B5_MARK,
|
||||
VI0_DATA6_VI0_B6_MARK, VI0_DATA7_VI0_B7_MARK,
|
||||
/* G */
|
||||
VI0_G0_MARK, VI0_G1_MARK,
|
||||
VI0_G2_MARK, VI0_G3_MARK,
|
||||
VI0_G4_MARK, VI0_G5_MARK,
|
||||
VI0_G6_MARK, VI0_G7_MARK,
|
||||
/* R */
|
||||
VI0_R0_MARK, VI0_R1_MARK,
|
||||
VI0_R2_MARK, VI0_R3_MARK,
|
||||
VI0_R4_MARK, VI0_R5_MARK,
|
||||
VI0_R6_MARK, VI0_R7_MARK,
|
||||
},
|
||||
};
|
||||
static const unsigned int vin0_data18_pins[] = {
|
||||
/* B */
|
||||
RCAR_GP_PIN(3, 3), RCAR_GP_PIN(3, 4),
|
||||
RCAR_GP_PIN(3, 5), RCAR_GP_PIN(3, 6),
|
||||
RCAR_GP_PIN(3, 7), RCAR_GP_PIN(3, 8),
|
||||
/* G */
|
||||
RCAR_GP_PIN(3, 15), RCAR_GP_PIN(3, 16),
|
||||
RCAR_GP_PIN(3, 17), RCAR_GP_PIN(3, 18),
|
||||
RCAR_GP_PIN(3, 19), RCAR_GP_PIN(3, 20),
|
||||
/* R */
|
||||
RCAR_GP_PIN(3, 23), RCAR_GP_PIN(3, 24),
|
||||
RCAR_GP_PIN(3, 25), RCAR_GP_PIN(3, 26),
|
||||
RCAR_GP_PIN(3, 27), RCAR_GP_PIN(3, 28),
|
||||
};
|
||||
static const unsigned int vin0_data18_mux[] = {
|
||||
/* B */
|
||||
VI0_DATA2_VI0_B2_MARK, VI0_DATA3_VI0_B3_MARK,
|
||||
VI0_DATA4_VI0_B4_MARK, VI0_DATA5_VI0_B5_MARK,
|
||||
VI0_DATA6_VI0_B6_MARK, VI0_DATA7_VI0_B7_MARK,
|
||||
/* G */
|
||||
VI0_G2_MARK, VI0_G3_MARK,
|
||||
VI0_G4_MARK, VI0_G5_MARK,
|
||||
VI0_G6_MARK, VI0_G7_MARK,
|
||||
/* R */
|
||||
VI0_R2_MARK, VI0_R3_MARK,
|
||||
VI0_R4_MARK, VI0_R5_MARK,
|
||||
VI0_R6_MARK, VI0_R7_MARK,
|
||||
};
|
||||
static const unsigned int vin0_sync_pins[] = {
|
||||
RCAR_GP_PIN(3, 11), /* HSYNC */
|
||||
RCAR_GP_PIN(3, 12), /* VSYNC */
|
||||
};
|
||||
static const unsigned int vin0_sync_mux[] = {
|
||||
VI0_HSYNC_N_MARK,
|
||||
VI0_VSYNC_N_MARK,
|
||||
};
|
||||
static const unsigned int vin0_field_pins[] = {
|
||||
RCAR_GP_PIN(3, 10),
|
||||
};
|
||||
static const unsigned int vin0_field_mux[] = {
|
||||
VI0_FIELD_MARK,
|
||||
};
|
||||
static const unsigned int vin0_clkenb_pins[] = {
|
||||
RCAR_GP_PIN(3, 9),
|
||||
};
|
||||
static const unsigned int vin0_clkenb_mux[] = {
|
||||
VI0_CLKENB_MARK,
|
||||
};
|
||||
static const unsigned int vin0_clk_pins[] = {
|
||||
RCAR_GP_PIN(3, 0),
|
||||
};
|
||||
static const unsigned int vin0_clk_mux[] = {
|
||||
VI0_CLK_MARK,
|
||||
};
|
||||
/* - VIN1 ------------------------------------------------------------------- */
|
||||
static const union vin_data vin1_data_pins = {
|
||||
.data12 = {
|
||||
RCAR_GP_PIN(5, 12), RCAR_GP_PIN(5, 13),
|
||||
RCAR_GP_PIN(5, 14), RCAR_GP_PIN(5, 15),
|
||||
RCAR_GP_PIN(5, 16), RCAR_GP_PIN(5, 17),
|
||||
RCAR_GP_PIN(5, 18), RCAR_GP_PIN(5, 19),
|
||||
RCAR_GP_PIN(1, 10), RCAR_GP_PIN(1, 11),
|
||||
RCAR_GP_PIN(1, 12), RCAR_GP_PIN(1, 13),
|
||||
},
|
||||
};
|
||||
static const union vin_data vin1_data_mux = {
|
||||
.data12 = {
|
||||
VI1_DATA0_MARK, VI1_DATA1_MARK,
|
||||
VI1_DATA2_MARK, VI1_DATA3_MARK,
|
||||
VI1_DATA4_MARK, VI1_DATA5_MARK,
|
||||
VI1_DATA6_MARK, VI1_DATA7_MARK,
|
||||
VI1_DATA8_MARK, VI1_DATA9_MARK,
|
||||
VI1_DATA10_MARK, VI1_DATA11_MARK,
|
||||
},
|
||||
};
|
||||
static const unsigned int vin1_sync_pins[] = {
|
||||
RCAR_GP_PIN(5, 22), /* HSYNC */
|
||||
RCAR_GP_PIN(5, 23), /* VSYNC */
|
||||
};
|
||||
static const unsigned int vin1_sync_mux[] = {
|
||||
VI1_HSYNC_N_MARK,
|
||||
VI1_VSYNC_N_MARK,
|
||||
};
|
||||
static const unsigned int vin1_field_pins[] = {
|
||||
RCAR_GP_PIN(5, 21),
|
||||
};
|
||||
static const unsigned int vin1_field_mux[] = {
|
||||
VI1_FIELD_MARK,
|
||||
};
|
||||
static const unsigned int vin1_clkenb_pins[] = {
|
||||
RCAR_GP_PIN(5, 20),
|
||||
};
|
||||
static const unsigned int vin1_clkenb_mux[] = {
|
||||
VI1_CLKENB_MARK,
|
||||
};
|
||||
static const unsigned int vin1_clk_pins[] = {
|
||||
RCAR_GP_PIN(5, 11),
|
||||
};
|
||||
static const unsigned int vin1_clk_mux[] = {
|
||||
VI1_CLK_MARK,
|
||||
};
|
||||
|
||||
static const struct sh_pfc_pin_group pinmux_groups[] = {
|
||||
SH_PFC_PIN_GROUP(eth_link),
|
||||
|
@ -2949,6 +3088,24 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
|
|||
SH_PFC_PIN_GROUP(sdhi2_wp),
|
||||
SH_PFC_PIN_GROUP(usb0),
|
||||
SH_PFC_PIN_GROUP(usb1),
|
||||
VIN_DATA_PIN_GROUP(vin0_data, 24),
|
||||
VIN_DATA_PIN_GROUP(vin0_data, 20),
|
||||
SH_PFC_PIN_GROUP(vin0_data18),
|
||||
VIN_DATA_PIN_GROUP(vin0_data, 16),
|
||||
VIN_DATA_PIN_GROUP(vin0_data, 12),
|
||||
VIN_DATA_PIN_GROUP(vin0_data, 10),
|
||||
VIN_DATA_PIN_GROUP(vin0_data, 8),
|
||||
SH_PFC_PIN_GROUP(vin0_sync),
|
||||
SH_PFC_PIN_GROUP(vin0_field),
|
||||
SH_PFC_PIN_GROUP(vin0_clkenb),
|
||||
SH_PFC_PIN_GROUP(vin0_clk),
|
||||
VIN_DATA_PIN_GROUP(vin1_data, 12),
|
||||
VIN_DATA_PIN_GROUP(vin1_data, 10),
|
||||
VIN_DATA_PIN_GROUP(vin1_data, 8),
|
||||
SH_PFC_PIN_GROUP(vin1_sync),
|
||||
SH_PFC_PIN_GROUP(vin1_field),
|
||||
SH_PFC_PIN_GROUP(vin1_clkenb),
|
||||
SH_PFC_PIN_GROUP(vin1_clk),
|
||||
};
|
||||
|
||||
static const char * const eth_groups[] = {
|
||||
|
@ -3229,6 +3386,30 @@ static const char * const usb1_groups[] = {
|
|||
"usb1",
|
||||
};
|
||||
|
||||
static const char * const vin0_groups[] = {
|
||||
"vin0_data24",
|
||||
"vin0_data20",
|
||||
"vin0_data18",
|
||||
"vin0_data16",
|
||||
"vin0_data12",
|
||||
"vin0_data10",
|
||||
"vin0_data8",
|
||||
"vin0_sync",
|
||||
"vin0_field",
|
||||
"vin0_clkenb",
|
||||
"vin0_clk",
|
||||
};
|
||||
|
||||
static const char * const vin1_groups[] = {
|
||||
"vin1_data12",
|
||||
"vin1_data10",
|
||||
"vin1_data8",
|
||||
"vin1_sync",
|
||||
"vin1_field",
|
||||
"vin1_clkenb",
|
||||
"vin1_clk",
|
||||
};
|
||||
|
||||
static const struct sh_pfc_function pinmux_functions[] = {
|
||||
SH_PFC_FUNCTION(eth),
|
||||
SH_PFC_FUNCTION(hscif0),
|
||||
|
@ -3265,6 +3446,8 @@ static const struct sh_pfc_function pinmux_functions[] = {
|
|||
SH_PFC_FUNCTION(sdhi2),
|
||||
SH_PFC_FUNCTION(usb0),
|
||||
SH_PFC_FUNCTION(usb1),
|
||||
SH_PFC_FUNCTION(vin0),
|
||||
SH_PFC_FUNCTION(vin1),
|
||||
};
|
||||
|
||||
static const struct pinmux_cfg_reg pinmux_config_regs[] = {
|
||||
|
@ -4214,6 +4397,6 @@ const struct sh_pfc_soc_info r8a7794_pinmux_info = {
|
|||
|
||||
.cfg_regs = pinmux_config_regs,
|
||||
|
||||
.gpio_data = pinmux_data,
|
||||
.gpio_data_size = ARRAY_SIZE(pinmux_data),
|
||||
.pinmux_data = pinmux_data,
|
||||
.pinmux_data_size = ARRAY_SIZE(pinmux_data),
|
||||
};
|
||||
|
|
|
@ -9,7 +9,6 @@
|
|||
*/
|
||||
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/platform_data/gpio-rcar.h>
|
||||
|
||||
#include "core.h"
|
||||
#include "sh_pfc.h"
|
||||
|
@ -2812,6 +2811,6 @@ const struct sh_pfc_soc_info r8a7795_pinmux_info = {
|
|||
|
||||
.cfg_regs = pinmux_config_regs,
|
||||
|
||||
.gpio_data = pinmux_data,
|
||||
.gpio_data_size = ARRAY_SIZE(pinmux_data),
|
||||
.pinmux_data = pinmux_data,
|
||||
.pinmux_data_size = ARRAY_SIZE(pinmux_data),
|
||||
};
|
||||
|
|
|
@ -1587,6 +1587,6 @@ const struct sh_pfc_soc_info sh7203_pinmux_info = {
|
|||
.cfg_regs = pinmux_config_regs,
|
||||
.data_regs = pinmux_data_regs,
|
||||
|
||||
.gpio_data = pinmux_data,
|
||||
.gpio_data_size = ARRAY_SIZE(pinmux_data),
|
||||
.pinmux_data = pinmux_data,
|
||||
.pinmux_data_size = ARRAY_SIZE(pinmux_data),
|
||||
};
|
||||
|
|
|
@ -2126,6 +2126,6 @@ const struct sh_pfc_soc_info sh7264_pinmux_info = {
|
|||
.cfg_regs = pinmux_config_regs,
|
||||
.data_regs = pinmux_data_regs,
|
||||
|
||||
.gpio_data = pinmux_data,
|
||||
.gpio_data_size = ARRAY_SIZE(pinmux_data),
|
||||
.pinmux_data = pinmux_data,
|
||||
.pinmux_data_size = ARRAY_SIZE(pinmux_data),
|
||||
};
|
||||
|
|
|
@ -2830,6 +2830,6 @@ const struct sh_pfc_soc_info sh7269_pinmux_info = {
|
|||
.cfg_regs = pinmux_config_regs,
|
||||
.data_regs = pinmux_data_regs,
|
||||
|
||||
.gpio_data = pinmux_data,
|
||||
.gpio_data_size = ARRAY_SIZE(pinmux_data),
|
||||
.pinmux_data = pinmux_data,
|
||||
.pinmux_data_size = ARRAY_SIZE(pinmux_data),
|
||||
};
|
||||
|
|
|
@ -3865,8 +3865,8 @@ const struct sh_pfc_soc_info sh73a0_pinmux_info = {
|
|||
.cfg_regs = pinmux_config_regs,
|
||||
.data_regs = pinmux_data_regs,
|
||||
|
||||
.gpio_data = pinmux_data,
|
||||
.gpio_data_size = ARRAY_SIZE(pinmux_data),
|
||||
.pinmux_data = pinmux_data,
|
||||
.pinmux_data_size = ARRAY_SIZE(pinmux_data),
|
||||
|
||||
.gpio_irq = pinmux_irqs,
|
||||
.gpio_irq_size = ARRAY_SIZE(pinmux_irqs),
|
||||
|
|
|
@ -1201,6 +1201,6 @@ const struct sh_pfc_soc_info sh7720_pinmux_info = {
|
|||
.cfg_regs = pinmux_config_regs,
|
||||
.data_regs = pinmux_data_regs,
|
||||
|
||||
.gpio_data = pinmux_data,
|
||||
.gpio_data_size = ARRAY_SIZE(pinmux_data),
|
||||
.pinmux_data = pinmux_data,
|
||||
.pinmux_data_size = ARRAY_SIZE(pinmux_data),
|
||||
};
|
||||
|
|
|
@ -1741,6 +1741,6 @@ const struct sh_pfc_soc_info sh7722_pinmux_info = {
|
|||
.cfg_regs = pinmux_config_regs,
|
||||
.data_regs = pinmux_data_regs,
|
||||
|
||||
.gpio_data = pinmux_data,
|
||||
.gpio_data_size = ARRAY_SIZE(pinmux_data),
|
||||
.pinmux_data = pinmux_data,
|
||||
.pinmux_data_size = ARRAY_SIZE(pinmux_data),
|
||||
};
|
||||
|
|
|
@ -1893,6 +1893,6 @@ const struct sh_pfc_soc_info sh7723_pinmux_info = {
|
|||
.cfg_regs = pinmux_config_regs,
|
||||
.data_regs = pinmux_data_regs,
|
||||
|
||||
.gpio_data = pinmux_data,
|
||||
.gpio_data_size = ARRAY_SIZE(pinmux_data),
|
||||
.pinmux_data = pinmux_data,
|
||||
.pinmux_data_size = ARRAY_SIZE(pinmux_data),
|
||||
};
|
||||
|
|
|
@ -2175,6 +2175,6 @@ const struct sh_pfc_soc_info sh7724_pinmux_info = {
|
|||
.cfg_regs = pinmux_config_regs,
|
||||
.data_regs = pinmux_data_regs,
|
||||
|
||||
.gpio_data = pinmux_data,
|
||||
.gpio_data_size = ARRAY_SIZE(pinmux_data),
|
||||
.pinmux_data = pinmux_data,
|
||||
.pinmux_data_size = ARRAY_SIZE(pinmux_data),
|
||||
};
|
||||
|
|
|
@ -2445,6 +2445,6 @@ const struct sh_pfc_soc_info sh7734_pinmux_info = {
|
|||
.cfg_regs = pinmux_config_regs,
|
||||
.data_regs = pinmux_data_regs,
|
||||
|
||||
.gpio_data = pinmux_data,
|
||||
.gpio_data_size = ARRAY_SIZE(pinmux_data),
|
||||
.pinmux_data = pinmux_data,
|
||||
.pinmux_data_size = ARRAY_SIZE(pinmux_data),
|
||||
};
|
||||
|
|
|
@ -2238,6 +2238,6 @@ const struct sh_pfc_soc_info sh7757_pinmux_info = {
|
|||
.cfg_regs = pinmux_config_regs,
|
||||
.data_regs = pinmux_data_regs,
|
||||
|
||||
.gpio_data = pinmux_data,
|
||||
.gpio_data_size = ARRAY_SIZE(pinmux_data),
|
||||
.pinmux_data = pinmux_data,
|
||||
.pinmux_data_size = ARRAY_SIZE(pinmux_data),
|
||||
};
|
||||
|
|
|
@ -1269,6 +1269,6 @@ const struct sh_pfc_soc_info sh7785_pinmux_info = {
|
|||
.cfg_regs = pinmux_config_regs,
|
||||
.data_regs = pinmux_data_regs,
|
||||
|
||||
.gpio_data = pinmux_data,
|
||||
.gpio_data_size = ARRAY_SIZE(pinmux_data),
|
||||
.pinmux_data = pinmux_data,
|
||||
.pinmux_data_size = ARRAY_SIZE(pinmux_data),
|
||||
};
|
||||
|
|
|
@ -813,6 +813,6 @@ const struct sh_pfc_soc_info sh7786_pinmux_info = {
|
|||
.cfg_regs = pinmux_config_regs,
|
||||
.data_regs = pinmux_data_regs,
|
||||
|
||||
.gpio_data = pinmux_data,
|
||||
.gpio_data_size = ARRAY_SIZE(pinmux_data),
|
||||
.pinmux_data = pinmux_data,
|
||||
.pinmux_data_size = ARRAY_SIZE(pinmux_data),
|
||||
};
|
||||
|
|
|
@ -554,8 +554,8 @@ const struct sh_pfc_soc_info shx3_pinmux_info = {
|
|||
.nr_pins = ARRAY_SIZE(pinmux_pins),
|
||||
.func_gpios = pinmux_func_gpios,
|
||||
.nr_func_gpios = ARRAY_SIZE(pinmux_func_gpios),
|
||||
.gpio_data = pinmux_data,
|
||||
.gpio_data_size = ARRAY_SIZE(pinmux_data),
|
||||
.pinmux_data = pinmux_data,
|
||||
.pinmux_data_size = ARRAY_SIZE(pinmux_data),
|
||||
.cfg_regs = pinmux_config_regs,
|
||||
.data_regs = pinmux_data_regs,
|
||||
};
|
||||
|
|
|
@ -52,6 +52,29 @@ struct sh_pfc_pin_group {
|
|||
unsigned int nr_pins;
|
||||
};
|
||||
|
||||
/*
|
||||
* Using union vin_data saves memory occupied by the VIN data pins.
|
||||
* VIN_DATA_PIN_GROUP() is a macro used to describe the VIN pin groups
|
||||
* in this case.
|
||||
*/
|
||||
#define VIN_DATA_PIN_GROUP(n, s) \
|
||||
{ \
|
||||
.name = #n#s, \
|
||||
.pins = n##_pins.data##s, \
|
||||
.mux = n##_mux.data##s, \
|
||||
.nr_pins = ARRAY_SIZE(n##_pins.data##s), \
|
||||
}
|
||||
|
||||
union vin_data {
|
||||
unsigned int data24[24];
|
||||
unsigned int data20[20];
|
||||
unsigned int data16[16];
|
||||
unsigned int data12[12];
|
||||
unsigned int data10[10];
|
||||
unsigned int data8[8];
|
||||
unsigned int data4[4];
|
||||
};
|
||||
|
||||
#define SH_PFC_FUNCTION(n) \
|
||||
{ \
|
||||
.name = #n, \
|
||||
|
@ -145,8 +168,8 @@ struct sh_pfc_soc_info {
|
|||
const struct pinmux_cfg_reg *cfg_regs;
|
||||
const struct pinmux_data_reg *data_regs;
|
||||
|
||||
const u16 *gpio_data;
|
||||
unsigned int gpio_data_size;
|
||||
const u16 *pinmux_data;
|
||||
unsigned int pinmux_data_size;
|
||||
|
||||
const struct pinmux_irq *gpio_irq;
|
||||
unsigned int gpio_irq_size;
|
||||
|
@ -159,7 +182,7 @@ struct sh_pfc_soc_info {
|
|||
*/
|
||||
|
||||
/*
|
||||
* sh_pfc_soc_info gpio_data array macros
|
||||
* sh_pfc_soc_info pinmux_data array macros
|
||||
*/
|
||||
|
||||
#define PINMUX_DATA(data_or_mark, ids...) data_or_mark, ids, 0
|
||||
|
@ -179,25 +202,27 @@ struct sh_pfc_soc_info {
|
|||
* GP port style (32 ports banks)
|
||||
*/
|
||||
|
||||
#define PORT_GP_1(bank, pin, fn, sfx) fn(bank, pin, GP_##bank##_##pin, sfx)
|
||||
#define PORT_GP_CFG_1(bank, pin, fn, sfx, cfg) fn(bank, pin, GP_##bank##_##pin, sfx, cfg)
|
||||
#define PORT_GP_1(bank, pin, fn, sfx) PORT_GP_CFG_1(bank, pin, fn, sfx, 0)
|
||||
|
||||
#define PORT_GP_32(bank, fn, sfx) \
|
||||
PORT_GP_1(bank, 0, fn, sfx), PORT_GP_1(bank, 1, fn, sfx), \
|
||||
PORT_GP_1(bank, 2, fn, sfx), PORT_GP_1(bank, 3, fn, sfx), \
|
||||
PORT_GP_1(bank, 4, fn, sfx), PORT_GP_1(bank, 5, fn, sfx), \
|
||||
PORT_GP_1(bank, 6, fn, sfx), PORT_GP_1(bank, 7, fn, sfx), \
|
||||
PORT_GP_1(bank, 8, fn, sfx), PORT_GP_1(bank, 9, fn, sfx), \
|
||||
PORT_GP_1(bank, 10, fn, sfx), PORT_GP_1(bank, 11, fn, sfx), \
|
||||
PORT_GP_1(bank, 12, fn, sfx), PORT_GP_1(bank, 13, fn, sfx), \
|
||||
PORT_GP_1(bank, 14, fn, sfx), PORT_GP_1(bank, 15, fn, sfx), \
|
||||
PORT_GP_1(bank, 16, fn, sfx), PORT_GP_1(bank, 17, fn, sfx), \
|
||||
PORT_GP_1(bank, 18, fn, sfx), PORT_GP_1(bank, 19, fn, sfx), \
|
||||
PORT_GP_1(bank, 20, fn, sfx), PORT_GP_1(bank, 21, fn, sfx), \
|
||||
PORT_GP_1(bank, 22, fn, sfx), PORT_GP_1(bank, 23, fn, sfx), \
|
||||
PORT_GP_1(bank, 24, fn, sfx), PORT_GP_1(bank, 25, fn, sfx), \
|
||||
PORT_GP_1(bank, 26, fn, sfx), PORT_GP_1(bank, 27, fn, sfx), \
|
||||
PORT_GP_1(bank, 28, fn, sfx), PORT_GP_1(bank, 29, fn, sfx), \
|
||||
PORT_GP_1(bank, 30, fn, sfx), PORT_GP_1(bank, 31, fn, sfx)
|
||||
#define PORT_GP_CFG_32(bank, fn, sfx, cfg) \
|
||||
PORT_GP_CFG_1(bank, 0, fn, sfx, cfg), PORT_GP_CFG_1(bank, 1, fn, sfx, cfg), \
|
||||
PORT_GP_CFG_1(bank, 2, fn, sfx, cfg), PORT_GP_CFG_1(bank, 3, fn, sfx, cfg), \
|
||||
PORT_GP_CFG_1(bank, 4, fn, sfx, cfg), PORT_GP_CFG_1(bank, 5, fn, sfx, cfg), \
|
||||
PORT_GP_CFG_1(bank, 6, fn, sfx, cfg), PORT_GP_CFG_1(bank, 7, fn, sfx, cfg), \
|
||||
PORT_GP_CFG_1(bank, 8, fn, sfx, cfg), PORT_GP_CFG_1(bank, 9, fn, sfx, cfg), \
|
||||
PORT_GP_CFG_1(bank, 10, fn, sfx, cfg), PORT_GP_CFG_1(bank, 11, fn, sfx, cfg), \
|
||||
PORT_GP_CFG_1(bank, 12, fn, sfx, cfg), PORT_GP_CFG_1(bank, 13, fn, sfx, cfg), \
|
||||
PORT_GP_CFG_1(bank, 14, fn, sfx, cfg), PORT_GP_CFG_1(bank, 15, fn, sfx, cfg), \
|
||||
PORT_GP_CFG_1(bank, 16, fn, sfx, cfg), PORT_GP_CFG_1(bank, 17, fn, sfx, cfg), \
|
||||
PORT_GP_CFG_1(bank, 18, fn, sfx, cfg), PORT_GP_CFG_1(bank, 19, fn, sfx, cfg), \
|
||||
PORT_GP_CFG_1(bank, 20, fn, sfx, cfg), PORT_GP_CFG_1(bank, 21, fn, sfx, cfg), \
|
||||
PORT_GP_CFG_1(bank, 22, fn, sfx, cfg), PORT_GP_CFG_1(bank, 23, fn, sfx, cfg), \
|
||||
PORT_GP_CFG_1(bank, 24, fn, sfx, cfg), PORT_GP_CFG_1(bank, 25, fn, sfx, cfg), \
|
||||
PORT_GP_CFG_1(bank, 26, fn, sfx, cfg), PORT_GP_CFG_1(bank, 27, fn, sfx, cfg), \
|
||||
PORT_GP_CFG_1(bank, 28, fn, sfx, cfg), PORT_GP_CFG_1(bank, 29, fn, sfx, cfg), \
|
||||
PORT_GP_CFG_1(bank, 30, fn, sfx, cfg), PORT_GP_CFG_1(bank, 31, fn, sfx, cfg)
|
||||
#define PORT_GP_32(bank, fn, sfx) PORT_GP_CFG_32(bank, fn, sfx, 0)
|
||||
|
||||
#define PORT_GP_32_REV(bank, fn, sfx) \
|
||||
PORT_GP_1(bank, 31, fn, sfx), PORT_GP_1(bank, 30, fn, sfx), \
|
||||
|
@ -218,20 +243,21 @@ struct sh_pfc_soc_info {
|
|||
PORT_GP_1(bank, 1, fn, sfx), PORT_GP_1(bank, 0, fn, sfx)
|
||||
|
||||
/* GP_ALL(suffix) - Expand to a list of GP_#_#_suffix */
|
||||
#define _GP_ALL(bank, pin, name, sfx) name##_##sfx
|
||||
#define _GP_ALL(bank, pin, name, sfx, cfg) name##_##sfx
|
||||
#define GP_ALL(str) CPU_ALL_PORT(_GP_ALL, str)
|
||||
|
||||
/* PINMUX_GPIO_GP_ALL - Expand to a list of sh_pfc_pin entries */
|
||||
#define _GP_GPIO(bank, _pin, _name, sfx) \
|
||||
#define _GP_GPIO(bank, _pin, _name, sfx, cfg) \
|
||||
{ \
|
||||
.pin = (bank * 32) + _pin, \
|
||||
.name = __stringify(_name), \
|
||||
.enum_id = _name##_DATA, \
|
||||
.configs = cfg, \
|
||||
}
|
||||
#define PINMUX_GPIO_GP_ALL() CPU_ALL_PORT(_GP_GPIO, unused)
|
||||
|
||||
/* PINMUX_DATA_GP_ALL - Expand to a list of name_DATA, name_FN marks */
|
||||
#define _GP_DATA(bank, pin, name, sfx) PINMUX_DATA(name##_DATA, name##_FN)
|
||||
#define _GP_DATA(bank, pin, name, sfx, cfg) PINMUX_DATA(name##_DATA, name##_FN)
|
||||
#define PINMUX_DATA_GP_ALL() CPU_ALL_PORT(_GP_DATA, unused)
|
||||
|
||||
/*
|
||||
|
@ -320,4 +346,9 @@ struct sh_pfc_soc_info {
|
|||
} \
|
||||
}
|
||||
|
||||
/*
|
||||
* GPIO number helper macro for R-Car
|
||||
*/
|
||||
#define RCAR_GP_PIN(bank, pin) (((bank) * 32) + (pin))
|
||||
|
||||
#endif /* __SH_PFC_H */
|
||||
|
|
|
@ -13,7 +13,6 @@
|
|||
#include <linux/gpio.h>
|
||||
#include <linux/of_gpio.h>
|
||||
#include <linux/phy/phy.h>
|
||||
#include <linux/platform_data/gpio-rcar.h>
|
||||
#include <linux/usb/phy.h>
|
||||
#include "common.h"
|
||||
#include "rcar2.h"
|
||||
|
|
Loading…
Reference in a new issue