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MIPS: Emulate the new MIPS R6 BNVC, BNEC and BNEZLAC instructions
MIPS R6 uses the <R6 DADDI opcode for the new BNVC, BNEC and BNEZLAC instructions. Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
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parent
c893ce38b2
commit
10d962d534
3 changed files with 7 additions and 2 deletions
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@ -25,7 +25,7 @@ enum major_op {
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andi_op, ori_op, xori_op, lui_op,
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cop0_op, cop1_op, cop2_op, cop1x_op,
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beql_op, bnel_op, blezl_op, bgtzl_op,
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daddi_op, daddiu_op, ldl_op, ldr_op,
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daddi_op, cbcond1_op = daddi_op, daddiu_op, ldl_op, ldr_op,
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spec2_op, jalx_op, mdmx_op, spec3_op,
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lb_op, lh_op, lwl_op, lw_op,
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lbu_op, lhu_op, lwr_op, lwu_op,
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@ -791,12 +791,16 @@ int __compute_return_epc_for_insn(struct pt_regs *regs,
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break;
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#endif
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case cbcond0_op:
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case cbcond1_op:
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/* Only valid for MIPS R6 */
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if (!cpu_has_mips_r6) {
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ret = -SIGILL;
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break;
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}
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/* Compact branches: bovc, beqc, beqzalc */
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/*
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* Compact branches:
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* bovc, beqc, beqzalc, bnvc, bnec, bnezlac
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*/
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if (insn.i_format.rt && !insn.i_format.rs)
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regs->regs[31] = epc + 4;
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regs->cp0_epc += 8;
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@ -624,6 +624,7 @@ static int isBranchInstr(struct pt_regs *regs, struct mm_decoded_insn dec_insn,
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dec_insn.next_pc_inc;
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return 1;
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case cbcond0_op:
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case cbcond1_op:
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if (!cpu_has_mips_r6)
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break;
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if (insn.i_format.rt && !insn.i_format.rs)
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