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tpm_tis: Introduce intermediate layer for TPM access
This splits tpm_tis in a high-level protocol part and a low-level interface for the actual TPM communication. The low-level interface can then be implemented by additional drivers to provide access to TPMs using other mechanisms, for example native I2C or SPI transfers, while still reusing the same TIS protocol implementation. Though the ioread/iowrite calls cannot fail, other implementations of this interface might want to return error codes if their communication fails. This follows the usual pattern of negative values representing errors and zero representing success. Positive values are not used (yet). Errors are passed back to the caller if possible. If the interface of a function does not allow that, it tries to do the most sensible thing it can, but this might also mean ignoring the error in this instance. This commit is based on the initial work by Peter Huewe. Signed-off-by: Alexander Steffen <Alexander.Steffen@infineon.com> Signed-off-by: Christophe Ricard <christophe-h.ricard@st.com> Reviewed-by: Jarkko Sakkinen <jarkko.sakkinen@linux.intel.com> Tested-by: Jarkko Sakkinen <jarkko.sakkinen@linux.intel.com> Tested-by: Stefan Berger <stefanb@linux.vnet.ibm.com> Reviewed-by: Stefan Berger <stefanb@linux.vnet.ibm.com> Signed-off-by: Jarkko Sakkinen <jarkko.sakkinen@linux.intel.com>
This commit is contained in:
parent
57dacc2b4c
commit
1107d065fd
2 changed files with 270 additions and 101 deletions
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@ -134,11 +134,16 @@ static inline int is_itpm(struct acpi_device *dev)
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static int wait_startup(struct tpm_chip *chip, int l)
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{
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struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
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struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(priv);
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unsigned long stop = jiffies + chip->timeout_a;
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int rc;
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u8 access;
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do {
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if (ioread8(phy->iobase + TPM_ACCESS(l)) &
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TPM_ACCESS_VALID)
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rc = tpm_tis_read8(priv, TPM_ACCESS(l), &access);
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if (rc < 0)
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return rc;
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if (access & TPM_ACCESS_VALID)
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return 0;
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msleep(TPM_TIMEOUT);
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} while (time_before(jiffies, stop));
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@ -148,10 +153,14 @@ static int wait_startup(struct tpm_chip *chip, int l)
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static int check_locality(struct tpm_chip *chip, int l)
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{
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struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
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struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(priv);
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int rc;
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u8 access;
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if ((ioread8(phy->iobase + TPM_ACCESS(l)) &
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(TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID)) ==
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rc = tpm_tis_read8(priv, TPM_ACCESS(l), &access);
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if (rc < 0)
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return rc;
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if ((access & (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID)) ==
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(TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID))
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return priv->locality = l;
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@ -161,27 +170,32 @@ static int check_locality(struct tpm_chip *chip, int l)
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static void release_locality(struct tpm_chip *chip, int l, int force)
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{
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struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
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struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(priv);
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int rc;
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u8 access;
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if (force || (ioread8(phy->iobase + TPM_ACCESS(l)) &
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rc = tpm_tis_read8(priv, TPM_ACCESS(l), &access);
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if (rc < 0)
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return;
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if (force || (access &
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(TPM_ACCESS_REQUEST_PENDING | TPM_ACCESS_VALID)) ==
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(TPM_ACCESS_REQUEST_PENDING | TPM_ACCESS_VALID))
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iowrite8(TPM_ACCESS_ACTIVE_LOCALITY,
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phy->iobase + TPM_ACCESS(l));
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tpm_tis_write8(priv, TPM_ACCESS(l), TPM_ACCESS_ACTIVE_LOCALITY);
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}
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static int request_locality(struct tpm_chip *chip, int l)
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{
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struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
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struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(priv);
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unsigned long stop, timeout;
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long rc;
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if (check_locality(chip, l) >= 0)
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return l;
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iowrite8(TPM_ACCESS_REQUEST_USE,
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phy->iobase + TPM_ACCESS(l));
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rc = tpm_tis_write8(priv, TPM_ACCESS(l), TPM_ACCESS_REQUEST_USE);
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if (rc < 0)
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return rc;
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stop = jiffies + chip->timeout_a;
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@ -215,38 +229,45 @@ static int request_locality(struct tpm_chip *chip, int l)
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static u8 tpm_tis_status(struct tpm_chip *chip)
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{
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struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
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struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(priv);
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int rc;
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u8 status;
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return ioread8(phy->iobase +
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TPM_STS(priv->locality));
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rc = tpm_tis_read8(priv, TPM_STS(priv->locality), &status);
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if (rc < 0)
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return 0;
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return status;
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}
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static void tpm_tis_ready(struct tpm_chip *chip)
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{
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struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
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struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(priv);
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/* this causes the current command to be aborted */
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iowrite8(TPM_STS_COMMAND_READY,
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phy->iobase + TPM_STS(priv->locality));
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tpm_tis_write8(priv, TPM_STS(priv->locality), TPM_STS_COMMAND_READY);
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}
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static int get_burstcount(struct tpm_chip *chip)
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{
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struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
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struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(priv);
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unsigned long stop;
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int burstcnt;
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int burstcnt, rc;
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u8 value;
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/* wait for burstcount */
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/* which timeout value, spec has 2 answers (c & d) */
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stop = jiffies + chip->timeout_d;
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do {
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burstcnt = ioread8(phy->iobase +
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TPM_STS(priv->locality) + 1);
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burstcnt += ioread8(phy->iobase +
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TPM_STS(priv->locality) +
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2) << 8;
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rc = tpm_tis_read8(priv, TPM_STS(priv->locality) + 1, &value);
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if (rc < 0)
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return rc;
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burstcnt = value;
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rc = tpm_tis_read8(priv, TPM_STS(priv->locality) + 2, &value);
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if (rc < 0)
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return rc;
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burstcnt += value << 8;
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if (burstcnt)
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return burstcnt;
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msleep(TPM_TIMEOUT);
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@ -257,18 +278,20 @@ static int get_burstcount(struct tpm_chip *chip)
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static int recv_data(struct tpm_chip *chip, u8 *buf, size_t count)
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{
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struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
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struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(priv);
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int size = 0, burstcnt;
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int size = 0, burstcnt, rc;
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while (size < count &&
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wait_for_tpm_stat(chip,
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TPM_STS_DATA_AVAIL | TPM_STS_VALID,
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chip->timeout_c,
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&priv->read_queue, true)
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== 0) {
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burstcnt = get_burstcount(chip);
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for (; burstcnt > 0 && size < count; burstcnt--)
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buf[size++] = ioread8(phy->iobase +
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TPM_DATA_FIFO(priv->locality));
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&priv->read_queue, true) == 0) {
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burstcnt = min_t(int, get_burstcount(chip), count - size);
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rc = tpm_tis_read_bytes(priv, TPM_DATA_FIFO(priv->locality),
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burstcnt, buf + size);
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if (rc < 0)
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return rc;
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size += burstcnt;
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}
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return size;
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}
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@ -332,7 +355,6 @@ MODULE_PARM_DESC(itpm, "Force iTPM workarounds (found on some Lenovo laptops)");
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static int tpm_tis_send_data(struct tpm_chip *chip, u8 *buf, size_t len)
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{
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struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
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struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(priv);
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int rc, status, burstcnt;
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size_t count = 0;
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@ -351,12 +373,13 @@ static int tpm_tis_send_data(struct tpm_chip *chip, u8 *buf, size_t len)
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}
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while (count < len - 1) {
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burstcnt = get_burstcount(chip);
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for (; burstcnt > 0 && count < len - 1; burstcnt--) {
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iowrite8(buf[count], phy->iobase +
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TPM_DATA_FIFO(priv->locality));
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count++;
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}
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burstcnt = min_t(int, get_burstcount(chip), len - count - 1);
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rc = tpm_tis_write_bytes(priv, TPM_DATA_FIFO(priv->locality),
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burstcnt, buf + count);
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if (rc < 0)
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goto out_err;
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count += burstcnt;
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wait_for_tpm_stat(chip, TPM_STS_VALID, chip->timeout_c,
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&priv->int_queue, false);
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@ -368,8 +391,10 @@ static int tpm_tis_send_data(struct tpm_chip *chip, u8 *buf, size_t len)
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}
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/* write last byte */
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iowrite8(buf[count],
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phy->iobase + TPM_DATA_FIFO(priv->locality));
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rc = tpm_tis_write8(priv, TPM_DATA_FIFO(priv->locality), buf[count]);
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if (rc < 0)
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goto out_err;
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wait_for_tpm_stat(chip, TPM_STS_VALID, chip->timeout_c,
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&priv->int_queue, false);
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status = tpm_tis_status(chip);
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@ -389,15 +414,16 @@ static int tpm_tis_send_data(struct tpm_chip *chip, u8 *buf, size_t len)
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static void disable_interrupts(struct tpm_chip *chip)
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{
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struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
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struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(priv);
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u32 intmask;
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int rc;
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rc = tpm_tis_read32(priv, TPM_INT_ENABLE(priv->locality), &intmask);
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if (rc < 0)
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intmask = 0;
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intmask =
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ioread32(phy->iobase +
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TPM_INT_ENABLE(priv->locality));
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intmask &= ~TPM_GLOBAL_INT_ENABLE;
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iowrite32(intmask,
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phy->iobase + TPM_INT_ENABLE(priv->locality));
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tpm_tis_write32(priv, TPM_INT_ENABLE(priv->locality), intmask);
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devm_free_irq(chip->dev.parent, priv->irq, chip);
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priv->irq = 0;
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chip->flags &= ~TPM_CHIP_FLAG_IRQ;
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static int tpm_tis_send_main(struct tpm_chip *chip, u8 *buf, size_t len)
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{
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struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
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struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(priv);
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int rc;
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u32 ordinal;
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unsigned long dur;
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return rc;
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/* go and do it */
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iowrite8(TPM_STS_GO,
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phy->iobase + TPM_STS(priv->locality));
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rc = tpm_tis_write8(priv, TPM_STS(priv->locality), TPM_STS_GO);
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if (rc < 0)
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return rc;
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if (chip->flags & TPM_CHIP_FLAG_IRQ) {
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ordinal = be32_to_cpu(*((__be32 *) (buf + 6)));
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@ -484,11 +510,12 @@ static bool tpm_tis_update_timeouts(struct tpm_chip *chip,
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unsigned long *timeout_cap)
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{
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struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
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struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(priv);
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int i;
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int i, rc;
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u32 did_vid;
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did_vid = ioread32(phy->iobase + TPM_DID_VID(0));
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rc = tpm_tis_read32(priv, TPM_DID_VID(0), &did_vid);
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if (rc < 0)
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return rc;
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for (i = 0; i != ARRAY_SIZE(vendor_timeout_overrides); i++) {
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if (vendor_timeout_overrides[i].did_vid != did_vid)
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@ -509,7 +536,6 @@ static bool tpm_tis_update_timeouts(struct tpm_chip *chip,
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static int probe_itpm(struct tpm_chip *chip)
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{
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struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
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struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(priv);
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int rc = 0;
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u8 cmd_getticks[] = {
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0x00, 0xc1, 0x00, 0x00, 0x00, 0x0a,
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@ -517,7 +543,11 @@ static int probe_itpm(struct tpm_chip *chip)
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};
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size_t len = sizeof(cmd_getticks);
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bool rem_itpm = itpm;
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u16 vendor = ioread16(phy->iobase + TPM_DID_VID(0));
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u16 vendor;
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rc = tpm_tis_read16(priv, TPM_DID_VID(0), &vendor);
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if (rc < 0)
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return rc;
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/* probe only iTPMS */
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if (vendor != TPM_VID_INTEL)
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@ -575,16 +605,68 @@ static const struct tpm_class_ops tpm_tis = {
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.req_canceled = tpm_tis_req_canceled,
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};
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static int tpm_tcg_read_bytes(struct tpm_tis_data *data, u32 addr, u16 len,
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u8 *result)
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{
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struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(data);
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while (len--)
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*result++ = ioread8(phy->iobase + addr);
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return 0;
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}
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static int tpm_tcg_write_bytes(struct tpm_tis_data *data, u32 addr, u16 len,
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u8 *value)
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{
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struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(data);
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while (len--)
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iowrite8(*value++, phy->iobase + addr);
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return 0;
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}
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static int tpm_tcg_read16(struct tpm_tis_data *data, u32 addr, u16 *result)
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{
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struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(data);
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*result = ioread16(phy->iobase + addr);
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return 0;
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}
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static int tpm_tcg_read32(struct tpm_tis_data *data, u32 addr, u32 *result)
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{
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struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(data);
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*result = ioread32(phy->iobase + addr);
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return 0;
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}
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static int tpm_tcg_write32(struct tpm_tis_data *data, u32 addr, u32 value)
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{
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struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(data);
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iowrite32(value, phy->iobase + addr);
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return 0;
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}
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static const struct tpm_tis_phy_ops tpm_tcg = {
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.read_bytes = tpm_tcg_read_bytes,
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.write_bytes = tpm_tcg_write_bytes,
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.read16 = tpm_tcg_read16,
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.read32 = tpm_tcg_read32,
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.write32 = tpm_tcg_write32,
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};
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static irqreturn_t tis_int_handler(int dummy, void *dev_id)
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{
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struct tpm_chip *chip = dev_id;
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struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
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struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(priv);
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u32 interrupt;
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int i;
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int i, rc;
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interrupt = ioread32(phy->iobase +
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TPM_INT_STATUS(priv->locality));
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rc = tpm_tis_read32(priv, TPM_INT_STATUS(priv->locality), &interrupt);
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if (rc < 0)
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return IRQ_NONE;
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if (interrupt == 0)
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return IRQ_NONE;
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@ -602,10 +684,11 @@ static irqreturn_t tis_int_handler(int dummy, void *dev_id)
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wake_up_interruptible(&priv->int_queue);
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/* Clear interrupts handled with TPM_EOI */
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iowrite32(interrupt,
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phy->iobase +
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TPM_INT_STATUS(priv->locality));
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ioread32(phy->iobase + TPM_INT_STATUS(priv->locality));
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rc = tpm_tis_write32(priv, TPM_INT_STATUS(priv->locality), interrupt);
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if (rc < 0)
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return IRQ_NONE;
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tpm_tis_read32(priv, TPM_INT_STATUS(priv->locality), &interrupt);
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return IRQ_HANDLED;
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}
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@ -617,8 +700,9 @@ static int tpm_tis_probe_irq_single(struct tpm_chip *chip, u32 intmask,
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int flags, int irq)
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{
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struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
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struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(priv);
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u8 original_int_vec;
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int rc;
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u32 int_status;
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if (devm_request_irq(chip->dev.parent, irq, tis_int_handler, flags,
|
||||
dev_name(&chip->dev), chip) != 0) {
|
||||
|
@ -628,19 +712,29 @@ static int tpm_tis_probe_irq_single(struct tpm_chip *chip, u32 intmask,
|
|||
}
|
||||
priv->irq = irq;
|
||||
|
||||
original_int_vec = ioread8(phy->iobase +
|
||||
TPM_INT_VECTOR(priv->locality));
|
||||
iowrite8(irq,
|
||||
phy->iobase + TPM_INT_VECTOR(priv->locality));
|
||||
rc = tpm_tis_read8(priv, TPM_INT_VECTOR(priv->locality),
|
||||
&original_int_vec);
|
||||
if (rc < 0)
|
||||
return rc;
|
||||
|
||||
rc = tpm_tis_write8(priv, TPM_INT_VECTOR(priv->locality), irq);
|
||||
if (rc < 0)
|
||||
return rc;
|
||||
|
||||
rc = tpm_tis_read32(priv, TPM_INT_STATUS(priv->locality), &int_status);
|
||||
if (rc < 0)
|
||||
return rc;
|
||||
|
||||
/* Clear all existing */
|
||||
iowrite32(ioread32(phy->iobase +
|
||||
TPM_INT_STATUS(priv->locality)),
|
||||
phy->iobase + TPM_INT_STATUS(priv->locality));
|
||||
rc = tpm_tis_write32(priv, TPM_INT_STATUS(priv->locality), int_status);
|
||||
if (rc < 0)
|
||||
return rc;
|
||||
|
||||
/* Turn on */
|
||||
iowrite32(intmask | TPM_GLOBAL_INT_ENABLE,
|
||||
phy->iobase + TPM_INT_ENABLE(priv->locality));
|
||||
rc = tpm_tis_write32(priv, TPM_INT_ENABLE(priv->locality),
|
||||
intmask | TPM_GLOBAL_INT_ENABLE);
|
||||
if (rc < 0)
|
||||
return rc;
|
||||
|
||||
priv->irq_tested = false;
|
||||
|
||||
|
@ -656,8 +750,11 @@ static int tpm_tis_probe_irq_single(struct tpm_chip *chip, u32 intmask,
|
|||
* will call disable_irq which undoes all of the above.
|
||||
*/
|
||||
if (!(chip->flags & TPM_CHIP_FLAG_IRQ)) {
|
||||
iowrite8(original_int_vec,
|
||||
phy->iobase + TPM_INT_VECTOR(priv->locality));
|
||||
rc = tpm_tis_write8(priv, TPM_INT_VECTOR(priv->locality),
|
||||
original_int_vec);
|
||||
if (rc < 0)
|
||||
return rc;
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
||||
|
@ -671,12 +768,13 @@ static int tpm_tis_probe_irq_single(struct tpm_chip *chip, u32 intmask,
|
|||
static void tpm_tis_probe_irq(struct tpm_chip *chip, u32 intmask)
|
||||
{
|
||||
struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
|
||||
struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(priv);
|
||||
u8 original_int_vec;
|
||||
int i;
|
||||
int i, rc;
|
||||
|
||||
original_int_vec = ioread8(phy->iobase +
|
||||
TPM_INT_VECTOR(priv->locality));
|
||||
rc = tpm_tis_read8(priv, TPM_INT_VECTOR(priv->locality),
|
||||
&original_int_vec);
|
||||
if (rc < 0)
|
||||
return;
|
||||
|
||||
if (!original_int_vec) {
|
||||
if (IS_ENABLED(CONFIG_X86))
|
||||
|
@ -696,10 +794,15 @@ MODULE_PARM_DESC(interrupts, "Enable interrupts");
|
|||
static void tpm_tis_remove(struct tpm_chip *chip)
|
||||
{
|
||||
struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
|
||||
struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(priv);
|
||||
void __iomem *reg = phy->iobase + TPM_INT_ENABLE(priv->locality);
|
||||
u32 reg = TPM_INT_ENABLE(priv->locality);
|
||||
u32 interrupt;
|
||||
int rc;
|
||||
|
||||
iowrite32(~TPM_GLOBAL_INT_ENABLE & ioread32(reg), reg);
|
||||
rc = tpm_tis_read32(priv, reg, &interrupt);
|
||||
if (rc < 0)
|
||||
interrupt = 0;
|
||||
|
||||
tpm_tis_write32(priv, reg, ~TPM_GLOBAL_INT_ENABLE & interrupt);
|
||||
release_locality(chip, priv->locality, 1);
|
||||
}
|
||||
|
||||
|
@ -707,6 +810,7 @@ static int tpm_tis_init(struct device *dev, struct tpm_info *tpm_info,
|
|||
acpi_handle acpi_dev_handle)
|
||||
{
|
||||
u32 vendor, intfcaps, intmask;
|
||||
u8 rid;
|
||||
int rc, probe;
|
||||
struct tpm_chip *chip;
|
||||
struct tpm_tis_tcg_phy *phy;
|
||||
|
@ -727,6 +831,8 @@ static int tpm_tis_init(struct device *dev, struct tpm_info *tpm_info,
|
|||
if (IS_ERR(phy->iobase))
|
||||
return PTR_ERR(phy->iobase);
|
||||
|
||||
phy->priv.phy_ops = &tpm_tcg;
|
||||
|
||||
/* Maximum timeouts */
|
||||
chip->timeout_a = TIS_TIMEOUT_A_MAX;
|
||||
chip->timeout_b = TIS_TIMEOUT_B_MAX;
|
||||
|
@ -741,13 +847,16 @@ static int tpm_tis_init(struct device *dev, struct tpm_info *tpm_info,
|
|||
}
|
||||
|
||||
/* Take control of the TPM's interrupt hardware and shut it off */
|
||||
intmask = ioread32(phy->iobase +
|
||||
TPM_INT_ENABLE(phy->priv.locality));
|
||||
rc = tpm_tis_read32(&phy->priv, TPM_INT_ENABLE(phy->priv.locality),
|
||||
&intmask);
|
||||
if (rc < 0)
|
||||
goto out_err;
|
||||
|
||||
intmask |= TPM_INTF_CMD_READY_INT | TPM_INTF_LOCALITY_CHANGE_INT |
|
||||
TPM_INTF_DATA_AVAIL_INT | TPM_INTF_STS_VALID_INT;
|
||||
intmask &= ~TPM_GLOBAL_INT_ENABLE;
|
||||
iowrite32(intmask,
|
||||
phy->iobase + TPM_INT_ENABLE(phy->priv.locality));
|
||||
tpm_tis_write32(&phy->priv, TPM_INT_ENABLE(phy->priv.locality),
|
||||
intmask);
|
||||
|
||||
if (request_locality(chip, 0) != 0) {
|
||||
rc = -ENODEV;
|
||||
|
@ -758,12 +867,19 @@ static int tpm_tis_init(struct device *dev, struct tpm_info *tpm_info,
|
|||
if (rc)
|
||||
goto out_err;
|
||||
|
||||
vendor = ioread32(phy->iobase + TPM_DID_VID(0));
|
||||
rc = tpm_tis_read32(&phy->priv, TPM_DID_VID(0), &vendor);
|
||||
if (rc < 0)
|
||||
goto out_err;
|
||||
|
||||
phy->priv.manufacturer_id = vendor;
|
||||
|
||||
rc = tpm_tis_read8(&phy->priv, TPM_RID(0), &rid);
|
||||
if (rc < 0)
|
||||
goto out_err;
|
||||
|
||||
dev_info(dev, "%s TPM (device-id 0x%X, rev-id %d)\n",
|
||||
(chip->flags & TPM_CHIP_FLAG_TPM2) ? "2.0" : "1.2",
|
||||
vendor >> 16, ioread8(phy->iobase + TPM_RID(0)));
|
||||
vendor >> 16, rid);
|
||||
|
||||
if (!itpm) {
|
||||
probe = probe_itpm(chip);
|
||||
|
@ -777,11 +893,12 @@ static int tpm_tis_init(struct device *dev, struct tpm_info *tpm_info,
|
|||
if (itpm)
|
||||
dev_info(dev, "Intel iTPM workaround enabled\n");
|
||||
|
||||
|
||||
/* Figure out the capabilities */
|
||||
intfcaps =
|
||||
ioread32(phy->iobase +
|
||||
TPM_INTF_CAPS(phy->priv.locality));
|
||||
rc = tpm_tis_read32(&phy->priv, TPM_INTF_CAPS(phy->priv.locality),
|
||||
&intfcaps);
|
||||
if (rc < 0)
|
||||
goto out_err;
|
||||
|
||||
dev_dbg(dev, "TPM interface capabilities (0x%x):\n",
|
||||
intfcaps);
|
||||
if (intfcaps & TPM_INTF_BURST_COUNT_STATIC)
|
||||
|
@ -860,23 +977,24 @@ static int tpm_tis_init(struct device *dev, struct tpm_info *tpm_info,
|
|||
static void tpm_tis_reenable_interrupts(struct tpm_chip *chip)
|
||||
{
|
||||
struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
|
||||
struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(priv);
|
||||
u32 intmask;
|
||||
int rc;
|
||||
|
||||
/* reenable interrupts that device may have lost or
|
||||
BIOS/firmware may have disabled */
|
||||
iowrite8(priv->irq, phy->iobase +
|
||||
TPM_INT_VECTOR(priv->locality));
|
||||
rc = tpm_tis_write8(priv, TPM_INT_VECTOR(priv->locality), priv->irq);
|
||||
if (rc < 0)
|
||||
return;
|
||||
|
||||
intmask =
|
||||
ioread32(phy->iobase + TPM_INT_ENABLE(priv->locality));
|
||||
rc = tpm_tis_read32(priv, TPM_INT_ENABLE(priv->locality), &intmask);
|
||||
if (rc < 0)
|
||||
return;
|
||||
|
||||
intmask |= TPM_INTF_CMD_READY_INT
|
||||
| TPM_INTF_LOCALITY_CHANGE_INT | TPM_INTF_DATA_AVAIL_INT
|
||||
| TPM_INTF_STS_VALID_INT | TPM_GLOBAL_INT_ENABLE;
|
||||
|
||||
iowrite32(intmask,
|
||||
phy->iobase + TPM_INT_ENABLE(priv->locality));
|
||||
tpm_tis_write32(priv, TPM_INT_ENABLE(priv->locality), intmask);
|
||||
}
|
||||
|
||||
static int tpm_tis_resume(struct device *dev)
|
||||
|
|
|
@ -32,6 +32,57 @@ struct tpm_tis_data {
|
|||
bool irq_tested;
|
||||
wait_queue_head_t int_queue;
|
||||
wait_queue_head_t read_queue;
|
||||
const struct tpm_tis_phy_ops *phy_ops;
|
||||
};
|
||||
|
||||
struct tpm_tis_phy_ops {
|
||||
int (*read_bytes)(struct tpm_tis_data *data, u32 addr, u16 len,
|
||||
u8 *result);
|
||||
int (*write_bytes)(struct tpm_tis_data *data, u32 addr, u16 len,
|
||||
u8 *value);
|
||||
int (*read16)(struct tpm_tis_data *data, u32 addr, u16 *result);
|
||||
int (*read32)(struct tpm_tis_data *data, u32 addr, u32 *result);
|
||||
int (*write32)(struct tpm_tis_data *data, u32 addr, u32 src);
|
||||
};
|
||||
|
||||
static inline int tpm_tis_read_bytes(struct tpm_tis_data *data, u32 addr,
|
||||
u16 len, u8 *result)
|
||||
{
|
||||
return data->phy_ops->read_bytes(data, addr, len, result);
|
||||
}
|
||||
|
||||
static inline int tpm_tis_read8(struct tpm_tis_data *data, u32 addr, u8 *result)
|
||||
{
|
||||
return data->phy_ops->read_bytes(data, addr, 1, result);
|
||||
}
|
||||
|
||||
static inline int tpm_tis_read16(struct tpm_tis_data *data, u32 addr,
|
||||
u16 *result)
|
||||
{
|
||||
return data->phy_ops->read16(data, addr, result);
|
||||
}
|
||||
|
||||
static inline int tpm_tis_read32(struct tpm_tis_data *data, u32 addr,
|
||||
u32 *result)
|
||||
{
|
||||
return data->phy_ops->read32(data, addr, result);
|
||||
}
|
||||
|
||||
static inline int tpm_tis_write_bytes(struct tpm_tis_data *data, u32 addr,
|
||||
u16 len, u8 *value)
|
||||
{
|
||||
return data->phy_ops->write_bytes(data, addr, len, value);
|
||||
}
|
||||
|
||||
static inline int tpm_tis_write8(struct tpm_tis_data *data, u32 addr, u8 value)
|
||||
{
|
||||
return data->phy_ops->write_bytes(data, addr, 1, &value);
|
||||
}
|
||||
|
||||
static inline int tpm_tis_write32(struct tpm_tis_data *data, u32 addr,
|
||||
u32 value)
|
||||
{
|
||||
return data->phy_ops->write32(data, addr, value);
|
||||
}
|
||||
|
||||
#endif
|
||||
|
|
Loading…
Reference in a new issue