mirrors/linux-stable
1
0
Fork 0
mirror of https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git synced 2024-10-05 00:20:32 +00:00
Code Issues Releases Wiki Activity

ASoC: Intel: Skylake: Reset stream to link mapping

Browse source 
By default all the streams are mapped to all links after controller is
reset which causes stream to be broadcast on all the links.

This patch resets the stream-link mapping after controller reset. The
stream is mapped later to the appropriate link as part of stream setup.

Tested-by: Abhijeet Kumar <abhijeet.kumar@intel.com>
Signed-off-by: Rakesh Ughreja <rakesh.a.ughreja@intel.com>
Signed-off-by: Sanyog Kale <sanyog.r.kale@intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Rakesh Ughreja 2018-04-01 15:13:23 +05:30 committed by Mark Brown
parent 74e651926e
commit 112c60b333
No known key found for this signature in database
GPG key ID: 24D68B725D5487D0
1 changed files with 7 additions and 0 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

7
sound/soc/intel/skylake/skl.c
View file

@ -127,10 +127,17 @@ static void skl_clock_power_gating(struct device *dev, bool enable)
*/
static int skl_init_chip(struct hdac_bus *bus, bool full_reset)
{
struct hdac_ext_bus *ebus = hbus_to_ebus(bus);
struct hdac_ext_link *hlink;
int ret;
skl_enable_miscbdcge(bus->dev, false);
ret = snd_hdac_bus_init_chip(bus, full_reset);
/* Reset stream-to-link mapping */
list_for_each_entry(hlink, &ebus->hlink_list, list)
bus->io_ops->reg_writel(0, hlink->ml_addr + AZX_REG_ML_LOSIDV);
skl_enable_miscbdcge(bus->dev, true);
return ret;