mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-09-05 18:39:59 +00:00
rtw89: coex: Add logic to parsing rtl8852c firmware type ctrl report
Add a part of logic to parse type of ctrl report from firmware, and remove Bluetooth packet counter count from driver, the feature was moved to firmware at rtl8852c. Signed-off-by: Ching-Te Ku <ku920601@realtek.com> Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220725023509.43114-4-pkshih@realtek.com
This commit is contained in:
parent
ba787c07ca
commit
1162584c79
3 changed files with 98 additions and 27 deletions
|
@ -876,7 +876,9 @@ static u32 _chk_btc_report(struct rtw89_dev *rtwdev,
|
|||
struct rtw89_btc_dm *dm = &btc->dm;
|
||||
struct rtw89_btc_rpt_cmn_info *pcinfo = NULL;
|
||||
struct rtw89_btc_wl_info *wl = &btc->cx.wl;
|
||||
struct rtw89_btc_fbtc_rpt_ctrl *prpt = NULL;
|
||||
struct rtw89_btc_bt_info *bt = &btc->cx.bt;
|
||||
struct rtw89_btc_fbtc_rpt_ctrl *prpt;
|
||||
struct rtw89_btc_fbtc_rpt_ctrl_v1 *prpt_v1;
|
||||
struct rtw89_btc_fbtc_cysta *pcysta_le32 = NULL;
|
||||
struct rtw89_btc_fbtc_cysta_cpu pcysta[1];
|
||||
struct rtw89_btc_prpt *btc_prpt = NULL;
|
||||
|
@ -907,8 +909,13 @@ static u32 _chk_btc_report(struct rtw89_dev *rtwdev,
|
|||
switch (rpt_type) {
|
||||
case BTC_RPT_TYPE_CTRL:
|
||||
pcinfo = &pfwinfo->rpt_ctrl.cinfo;
|
||||
pfinfo = (u8 *)(&pfwinfo->rpt_ctrl.finfo);
|
||||
pcinfo->req_len = sizeof(pfwinfo->rpt_ctrl.finfo);
|
||||
if (chip->chip_id == RTL8852A) {
|
||||
pfinfo = (u8 *)(&pfwinfo->rpt_ctrl.finfo);
|
||||
pcinfo->req_len = sizeof(pfwinfo->rpt_ctrl.finfo);
|
||||
} else {
|
||||
pfinfo = (u8 *)(&pfwinfo->rpt_ctrl.finfo_v1);
|
||||
pcinfo->req_len = sizeof(pfwinfo->rpt_ctrl.finfo_v1);
|
||||
}
|
||||
pcinfo->req_fver = chip->fcxbtcrpt_ver;
|
||||
pcinfo->rx_len = rpt_len;
|
||||
pcinfo->rx_cnt++;
|
||||
|
@ -1127,12 +1134,12 @@ static u32 _chk_btc_report(struct rtw89_dev *rtwdev,
|
|||
_chk_btc_err(rtwdev, BTC_DCNT_CYCLE_FREEZE, (u32)pcysta->cycles);
|
||||
}
|
||||
|
||||
if (rpt_type == BTC_RPT_TYPE_CTRL) {
|
||||
if (rpt_type == BTC_RPT_TYPE_CTRL && chip->chip_id == RTL8852A) {
|
||||
prpt = &pfwinfo->rpt_ctrl.finfo;
|
||||
btc->fwinfo.rpt_en_map = prpt->rpt_enable;
|
||||
wl->ver_info.fw_coex = prpt->wl_fw_coex_ver;
|
||||
wl->ver_info.fw = prpt->wl_fw_ver;
|
||||
dm->wl_fw_cx_offload = !!(prpt->wl_fw_cx_offload);
|
||||
dm->wl_fw_cx_offload = !!prpt->wl_fw_cx_offload;
|
||||
|
||||
_chk_btc_err(rtwdev, BTC_DCNT_RPT_FREEZE,
|
||||
pfwinfo->event[BTF_EVNT_RPT]);
|
||||
|
@ -1145,6 +1152,33 @@ static u32 _chk_btc_report(struct rtw89_dev *rtwdev,
|
|||
btc->cx.cnt_bt[BTC_BCNT_POLUT] =
|
||||
rtw89_mac_get_plt_cnt(rtwdev, RTW89_MAC_0);
|
||||
}
|
||||
} else if (rpt_type == BTC_RPT_TYPE_CTRL) {
|
||||
prpt_v1 = &pfwinfo->rpt_ctrl.finfo_v1;
|
||||
btc->fwinfo.rpt_en_map = le32_to_cpu(prpt_v1->rpt_info.en);
|
||||
wl->ver_info.fw_coex = le32_to_cpu(prpt_v1->wl_fw_info.cx_ver);
|
||||
wl->ver_info.fw = le32_to_cpu(prpt_v1->wl_fw_info.fw_ver);
|
||||
dm->wl_fw_cx_offload = !!le32_to_cpu(prpt_v1->wl_fw_info.cx_offload);
|
||||
|
||||
for (i = RTW89_PHY_0; i < RTW89_PHY_MAX; i++)
|
||||
memcpy(&dm->gnt.band[i], &prpt_v1->gnt_val[i],
|
||||
sizeof(dm->gnt.band[i]));
|
||||
|
||||
btc->cx.cnt_bt[BTC_BCNT_HIPRI_TX] = le32_to_cpu(prpt_v1->bt_cnt[BTC_BCNT_HI_TX]);
|
||||
btc->cx.cnt_bt[BTC_BCNT_HIPRI_RX] = le32_to_cpu(prpt_v1->bt_cnt[BTC_BCNT_HI_RX]);
|
||||
btc->cx.cnt_bt[BTC_BCNT_LOPRI_TX] = le32_to_cpu(prpt_v1->bt_cnt[BTC_BCNT_LO_TX]);
|
||||
btc->cx.cnt_bt[BTC_BCNT_LOPRI_RX] = le32_to_cpu(prpt_v1->bt_cnt[BTC_BCNT_LO_RX]);
|
||||
btc->cx.cnt_bt[BTC_BCNT_POLUT] = le32_to_cpu(prpt_v1->bt_cnt[BTC_BCNT_POLLUTED]);
|
||||
|
||||
_chk_btc_err(rtwdev, BTC_DCNT_BTCNT_FREEZE, 0);
|
||||
_chk_btc_err(rtwdev, BTC_DCNT_RPT_FREEZE,
|
||||
pfwinfo->event[BTF_EVNT_RPT]);
|
||||
|
||||
if (le32_to_cpu(prpt_v1->bt_cnt[BTC_BCNT_RFK_TIMEOUT]) > 0)
|
||||
bt->rfk_info.map.timeout = 1;
|
||||
else
|
||||
bt->rfk_info.map.timeout = 0;
|
||||
|
||||
dm->error.map.bt_rfk_timeout = bt->rfk_info.map.timeout;
|
||||
}
|
||||
|
||||
if (rpt_type >= BTC_RPT_TYPE_BT_VER &&
|
||||
|
|
|
@ -808,7 +808,7 @@ struct rtw89_mac_ax_gnt {
|
|||
u8 gnt_bt;
|
||||
u8 gnt_wl_sw_en;
|
||||
u8 gnt_wl;
|
||||
};
|
||||
} __packed;
|
||||
|
||||
#define RTW89_MAC_AX_COEX_GNT_NR 2
|
||||
struct rtw89_mac_ax_coex_gnt {
|
||||
|
@ -1375,13 +1375,18 @@ struct rtw89_btc_fbtc_tdma {
|
|||
#define FCXMAX_STEP 255 /*STEP trace record cnt, Max:65535, default:255*/
|
||||
#define BTC_CYCLE_SLOT_MAX 48 /* must be even number, non-zero */
|
||||
|
||||
enum rtw89_btc_bt_rfk_counter {
|
||||
enum rtw89_btc_bt_sta_counter {
|
||||
BTC_BCNT_RFK_REQ = 0,
|
||||
BTC_BCNT_RFK_GO = 1,
|
||||
BTC_BCNT_RFK_REJECT = 2,
|
||||
BTC_BCNT_RFK_FAIL = 3,
|
||||
BTC_BCNT_RFK_TIMEOUT = 4,
|
||||
BTC_BCNT_RFK_MAX
|
||||
BTC_BCNT_HI_TX = 5,
|
||||
BTC_BCNT_HI_RX = 6,
|
||||
BTC_BCNT_LO_TX = 7,
|
||||
BTC_BCNT_LO_RX = 8,
|
||||
BTC_BCNT_POLLUTED = 9,
|
||||
BTC_BCNT_STA_MAX
|
||||
};
|
||||
|
||||
struct rtw89_btc_fbtc_rpt_ctrl {
|
||||
|
@ -1398,11 +1403,56 @@ struct rtw89_btc_fbtc_rpt_ctrl {
|
|||
u32 mb_a2dp_empty_cnt; /* a2dp empty count */
|
||||
u32 mb_a2dp_flct_cnt; /* a2dp empty flow control counter */
|
||||
u32 mb_a2dp_full_cnt; /* a2dp empty full counter */
|
||||
u32 bt_rfk_cnt[BTC_BCNT_RFK_MAX];
|
||||
u32 bt_rfk_cnt[BTC_BCNT_HI_TX];
|
||||
u32 c2h_cnt; /* fw send c2h counter */
|
||||
u32 h2c_cnt; /* fw recv h2c counter */
|
||||
} __packed;
|
||||
|
||||
struct rtw89_btc_fbtc_rpt_ctrl_info {
|
||||
__le32 cnt; /* fw report counter */
|
||||
__le32 en; /* report map */
|
||||
__le32 para; /* not used */
|
||||
|
||||
__le32 cnt_c2h; /* fw send c2h counter */
|
||||
__le32 cnt_h2c; /* fw recv h2c counter */
|
||||
__le32 len_c2h; /* The total length of the last C2H */
|
||||
|
||||
__le32 cnt_aoac_rf_on; /* rf-on counter for aoac switch notify */
|
||||
__le32 cnt_aoac_rf_off; /* rf-off counter for aoac switch notify */
|
||||
} __packed;
|
||||
|
||||
struct rtw89_btc_fbtc_rpt_ctrl_wl_fw_info {
|
||||
__le32 cx_ver; /* match which driver's coex version */
|
||||
__le32 cx_offload;
|
||||
__le32 fw_ver;
|
||||
} __packed;
|
||||
|
||||
struct rtw89_btc_fbtc_rpt_ctrl_a2dp_empty {
|
||||
__le32 cnt_empty; /* a2dp empty count */
|
||||
__le32 cnt_flowctrl; /* a2dp empty flow control counter */
|
||||
__le32 cnt_tx;
|
||||
__le32 cnt_ack;
|
||||
__le32 cnt_nack;
|
||||
} __packed;
|
||||
|
||||
struct rtw89_btc_fbtc_rpt_ctrl_bt_mailbox {
|
||||
__le32 cnt_send_ok; /* fw send mailbox ok counter */
|
||||
__le32 cnt_send_fail; /* fw send mailbox fail counter */
|
||||
__le32 cnt_recv; /* fw recv mailbox counter */
|
||||
struct rtw89_btc_fbtc_rpt_ctrl_a2dp_empty a2dp;
|
||||
} __packed;
|
||||
|
||||
struct rtw89_btc_fbtc_rpt_ctrl_v1 {
|
||||
u8 fver;
|
||||
u8 rsvd;
|
||||
__le16 rsvd1;
|
||||
struct rtw89_btc_fbtc_rpt_ctrl_info rpt_info;
|
||||
struct rtw89_btc_fbtc_rpt_ctrl_wl_fw_info wl_fw_info;
|
||||
struct rtw89_btc_fbtc_rpt_ctrl_bt_mailbox bt_mbx_info;
|
||||
__le32 bt_cnt[BTC_BCNT_STA_MAX];
|
||||
struct rtw89_mac_ax_gnt gnt_val[RTW89_PHY_MAX];
|
||||
} __packed;
|
||||
|
||||
enum rtw89_fbtc_ext_ctrl_type {
|
||||
CXECTL_OFF = 0x0, /* tdma off */
|
||||
CXECTL_B2 = 0x1, /* allow B2 (beacon-early) */
|
||||
|
@ -1706,7 +1756,10 @@ struct rtw89_btc_rpt_cmn_info {
|
|||
|
||||
struct rtw89_btc_report_ctrl_state {
|
||||
struct rtw89_btc_rpt_cmn_info cinfo; /* common info, by driver */
|
||||
struct rtw89_btc_fbtc_rpt_ctrl finfo; /* info from fw */
|
||||
union {
|
||||
struct rtw89_btc_fbtc_rpt_ctrl finfo; /* info from fw for 52A*/
|
||||
struct rtw89_btc_fbtc_rpt_ctrl_v1 finfo_v1; /* info from fw for 52C*/
|
||||
};
|
||||
};
|
||||
|
||||
struct rtw89_btc_rpt_fbtc_tdma {
|
||||
|
|
|
@ -2793,23 +2793,7 @@ void rtw8852c_btc_bt_aci_imp(struct rtw89_dev *rtwdev)
|
|||
static
|
||||
void rtw8852c_btc_update_bt_cnt(struct rtw89_dev *rtwdev)
|
||||
{
|
||||
struct rtw89_btc *btc = &rtwdev->btc;
|
||||
struct rtw89_btc_cx *cx = &btc->cx;
|
||||
u32 val;
|
||||
|
||||
val = rtw89_read32(rtwdev, R_BTC_BT_CNT_HIGH);
|
||||
cx->cnt_bt[BTC_BCNT_HIPRI_TX] = FIELD_GET(B_AX_STATIS_BT_HI_TX_MASK, val);
|
||||
cx->cnt_bt[BTC_BCNT_HIPRI_RX] = FIELD_GET(B_AX_STATIS_BT_HI_RX_MASK, val);
|
||||
|
||||
val = rtw89_read32(rtwdev, R_BTC_BT_CNT_LOW);
|
||||
cx->cnt_bt[BTC_BCNT_LOPRI_TX] = FIELD_GET(B_AX_STATIS_BT_LO_TX_1_MASK, val);
|
||||
cx->cnt_bt[BTC_BCNT_LOPRI_RX] = FIELD_GET(B_AX_STATIS_BT_LO_RX_1_MASK, val);
|
||||
|
||||
/* clock-gate off before reset counter*/
|
||||
rtw89_write32_set(rtwdev, R_AX_BTC_CFG, B_AX_DIS_BTC_CLK_G);
|
||||
rtw89_write32_clr(rtwdev, R_AX_BT_CNT_CFG, B_AX_BT_CNT_RST);
|
||||
rtw89_write32_set(rtwdev, R_AX_BT_CNT_CFG, B_AX_BT_CNT_RST);
|
||||
rtw89_write32_clr(rtwdev, R_AX_BTC_CFG, B_AX_DIS_BTC_CLK_G);
|
||||
/* Feature move to firmware */
|
||||
}
|
||||
|
||||
static
|
||||
|
|
Loading…
Reference in a new issue