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drm/amdgpu: Add otg vertical IRQ Source
[Why & How] In order to get appropriate timing for registers which read/write is vertical line sensitive, add new IRQ source variable. This interrupt is triggered by specific vertical line, Signed-off-by: Wayne Lin <Wayne.Lin@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -891,6 +891,7 @@ struct amdgpu_device {
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/* For pre-DCE11. DCE11 and later are in "struct amdgpu_device->dm" */
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struct work_struct hotplug_work;
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struct amdgpu_irq_src crtc_irq;
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struct amdgpu_irq_src vline0_irq;
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struct amdgpu_irq_src vupdate_irq;
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struct amdgpu_irq_src pageflip_irq;
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struct amdgpu_irq_src hpd_irq;
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