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https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-09-12 05:48:40 +00:00
qed: Correct HW stop flow
Management firmware is used as arbiter between different PFs which are loading/unloading, but in order to use the synchronization it offers the contending configurations need to be applied either between their LOAD_REQ <-> LOAD_DONE or UNLOAD_REQ <-> UNLOAD_DONE management firmware commands. Existing HW stop flow utilizes 2 different functions: qed_hw_stop() and qed_hw_reset() which don't abide this requirement; Most of the closure is doing outside the scope of the unload request. This patch removes qed_hw_reset() and places the relevant stop functionality underneath the management firmware protection. Signed-off-by: Tomer Tayar <Tomer.Tayar@cavium.com> Signed-off-by: Yuval Mintz <Yuval.Mintz@cavium.com> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
parent
30b38236e1
commit
1226337ad9
6 changed files with 143 additions and 136 deletions
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@ -732,5 +732,6 @@ void qed_get_protocol_stats(struct qed_dev *cdev,
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enum qed_mcp_protocol_type type,
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union qed_mcp_protocol_stats *stats);
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int qed_slowpath_irq_req(struct qed_hwfn *hwfn);
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void qed_slowpath_irq_sync(struct qed_hwfn *p_hwfn);
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#endif /* _QED_H */
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@ -1303,27 +1303,53 @@ void qed_hw_timers_stop_all(struct qed_dev *cdev)
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int qed_hw_stop(struct qed_dev *cdev)
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{
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int rc = 0, t_rc;
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struct qed_hwfn *p_hwfn;
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struct qed_ptt *p_ptt;
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int rc, rc2 = 0;
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int j;
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for_each_hwfn(cdev, j) {
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struct qed_hwfn *p_hwfn = &cdev->hwfns[j];
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struct qed_ptt *p_ptt = p_hwfn->p_main_ptt;
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p_hwfn = &cdev->hwfns[j];
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p_ptt = p_hwfn->p_main_ptt;
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DP_VERBOSE(p_hwfn, NETIF_MSG_IFDOWN, "Stopping hw/fw\n");
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if (IS_VF(cdev)) {
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qed_vf_pf_int_cleanup(p_hwfn);
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rc = qed_vf_pf_reset(p_hwfn);
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if (rc) {
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DP_NOTICE(p_hwfn,
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"qed_vf_pf_reset failed. rc = %d.\n",
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rc);
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rc2 = -EINVAL;
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}
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continue;
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}
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/* mark the hw as uninitialized... */
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p_hwfn->hw_init_done = false;
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rc = qed_sp_pf_stop(p_hwfn);
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if (rc)
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/* Send unload command to MCP */
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rc = qed_mcp_unload_req(p_hwfn, p_ptt);
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if (rc) {
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DP_NOTICE(p_hwfn,
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"Failed to close PF against FW. Continue to stop HW to prevent illegal host access by the device\n");
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"Failed sending a UNLOAD_REQ command. rc = %d.\n",
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rc);
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rc2 = -EINVAL;
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}
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qed_slowpath_irq_sync(p_hwfn);
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/* After this point no MFW attentions are expected, e.g. prevent
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* race between pf stop and dcbx pf update.
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*/
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rc = qed_sp_pf_stop(p_hwfn);
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if (rc) {
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DP_NOTICE(p_hwfn,
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"Failed to close PF against FW [rc = %d]. Continue to stop HW to prevent illegal host access by the device.\n",
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rc);
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rc2 = -EINVAL;
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}
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qed_wr(p_hwfn, p_ptt,
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NIG_REG_RX_LLH_BRB_GATE_DNTFWD_PERPF, 0x1);
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@ -1346,20 +1372,37 @@ int qed_hw_stop(struct qed_dev *cdev)
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/* Need to wait 1ms to guarantee SBs are cleared */
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usleep_range(1000, 2000);
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/* Disable PF in HW blocks */
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qed_wr(p_hwfn, p_ptt, DORQ_REG_PF_DB_ENABLE, 0);
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qed_wr(p_hwfn, p_ptt, QM_REG_PF_EN, 0);
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qed_mcp_unload_done(p_hwfn, p_ptt);
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if (rc) {
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DP_NOTICE(p_hwfn,
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"Failed sending a UNLOAD_DONE command. rc = %d.\n",
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rc);
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rc2 = -EINVAL;
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}
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}
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if (IS_PF(cdev)) {
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p_hwfn = QED_LEADING_HWFN(cdev);
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p_ptt = QED_LEADING_HWFN(cdev)->p_main_ptt;
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/* Disable DMAE in PXP - in CMT, this should only be done for
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* first hw-function, and only after all transactions have
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* stopped for all active hw-functions.
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*/
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t_rc = qed_change_pci_hwfn(&cdev->hwfns[0],
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cdev->hwfns[0].p_main_ptt, false);
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if (t_rc != 0)
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rc = t_rc;
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rc = qed_change_pci_hwfn(p_hwfn, p_ptt, false);
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if (rc) {
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DP_NOTICE(p_hwfn,
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"qed_change_pci_hwfn failed. rc = %d.\n", rc);
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rc2 = -EINVAL;
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}
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}
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return rc;
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return rc2;
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}
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void qed_hw_stop_fastpath(struct qed_dev *cdev)
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@ -1404,89 +1447,6 @@ void qed_hw_start_fastpath(struct qed_hwfn *p_hwfn)
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NIG_REG_RX_LLH_BRB_GATE_DNTFWD_PERPF, 0x0);
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}
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static int qed_reg_assert(struct qed_hwfn *p_hwfn,
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struct qed_ptt *p_ptt, u32 reg, bool expected)
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{
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u32 assert_val = qed_rd(p_hwfn, p_ptt, reg);
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if (assert_val != expected) {
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DP_NOTICE(p_hwfn, "Value at address 0x%08x != 0x%08x\n",
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reg, expected);
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return -EINVAL;
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}
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return 0;
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}
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int qed_hw_reset(struct qed_dev *cdev)
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{
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int rc = 0;
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u32 unload_resp, unload_param;
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u32 wol_param;
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int i;
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switch (cdev->wol_config) {
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case QED_OV_WOL_DISABLED:
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wol_param = DRV_MB_PARAM_UNLOAD_WOL_DISABLED;
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break;
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case QED_OV_WOL_ENABLED:
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wol_param = DRV_MB_PARAM_UNLOAD_WOL_ENABLED;
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break;
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default:
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DP_NOTICE(cdev,
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"Unknown WoL configuration %02x\n", cdev->wol_config);
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/* Fallthrough */
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case QED_OV_WOL_DEFAULT:
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wol_param = DRV_MB_PARAM_UNLOAD_WOL_MCP;
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}
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for_each_hwfn(cdev, i) {
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struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
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if (IS_VF(cdev)) {
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rc = qed_vf_pf_reset(p_hwfn);
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if (rc)
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return rc;
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continue;
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}
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DP_VERBOSE(p_hwfn, NETIF_MSG_IFDOWN, "Resetting hw/fw\n");
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/* Check for incorrect states */
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qed_reg_assert(p_hwfn, p_hwfn->p_main_ptt,
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QM_REG_USG_CNT_PF_TX, 0);
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qed_reg_assert(p_hwfn, p_hwfn->p_main_ptt,
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QM_REG_USG_CNT_PF_OTHER, 0);
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/* Disable PF in HW blocks */
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qed_wr(p_hwfn, p_hwfn->p_main_ptt, DORQ_REG_PF_DB_ENABLE, 0);
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qed_wr(p_hwfn, p_hwfn->p_main_ptt, QM_REG_PF_EN, 0);
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qed_wr(p_hwfn, p_hwfn->p_main_ptt,
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TCFC_REG_STRONG_ENABLE_PF, 0);
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qed_wr(p_hwfn, p_hwfn->p_main_ptt,
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CCFC_REG_STRONG_ENABLE_PF, 0);
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/* Send unload command to MCP */
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rc = qed_mcp_cmd(p_hwfn, p_hwfn->p_main_ptt,
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DRV_MSG_CODE_UNLOAD_REQ, wol_param,
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&unload_resp, &unload_param);
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if (rc) {
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DP_NOTICE(p_hwfn, "qed_hw_reset: UNLOAD_REQ failed\n");
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unload_resp = FW_MSG_CODE_DRV_UNLOAD_ENGINE;
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}
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rc = qed_mcp_cmd(p_hwfn, p_hwfn->p_main_ptt,
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DRV_MSG_CODE_UNLOAD_DONE,
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0, &unload_resp, &unload_param);
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if (rc) {
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DP_NOTICE(p_hwfn, "qed_hw_reset: UNLOAD_DONE failed\n");
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return rc;
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}
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}
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return rc;
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}
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/* Free hwfn memory and resources acquired in hw_hwfn_prepare */
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static void qed_hw_hwfn_free(struct qed_hwfn *p_hwfn)
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{
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@ -140,14 +140,6 @@ void qed_hw_stop_fastpath(struct qed_dev *cdev);
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*/
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void qed_hw_start_fastpath(struct qed_hwfn *p_hwfn);
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/**
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* @brief qed_hw_reset -
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*
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* @param cdev
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*
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* @return int
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*/
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int qed_hw_reset(struct qed_dev *cdev);
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/**
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* @brief qed_hw_prepare -
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@ -589,6 +589,19 @@ int qed_slowpath_irq_req(struct qed_hwfn *hwfn)
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return rc;
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}
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void qed_slowpath_irq_sync(struct qed_hwfn *p_hwfn)
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{
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struct qed_dev *cdev = p_hwfn->cdev;
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u8 id = p_hwfn->my_id;
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u32 int_mode;
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int_mode = cdev->int_params.out.int_mode;
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if (int_mode == QED_INT_MODE_MSIX)
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synchronize_irq(cdev->int_params.msix_table[id].vector);
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else
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synchronize_irq(cdev->pdev->irq);
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}
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static void qed_slowpath_irq_free(struct qed_dev *cdev)
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{
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int i;
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@ -631,19 +644,6 @@ static int qed_nic_stop(struct qed_dev *cdev)
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return rc;
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}
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static int qed_nic_reset(struct qed_dev *cdev)
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{
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int rc;
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rc = qed_hw_reset(cdev);
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if (rc)
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return rc;
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qed_resc_free(cdev);
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return 0;
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}
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static int qed_nic_setup(struct qed_dev *cdev)
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{
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int rc, i;
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}
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qed_disable_msix(cdev);
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qed_nic_reset(cdev);
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qed_resc_free(cdev);
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qed_iov_wq_stop(cdev, true);
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@ -550,32 +550,12 @@ int qed_mcp_cmd(struct qed_hwfn *p_hwfn,
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u32 *o_mcp_param)
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{
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struct qed_mcp_mb_params mb_params;
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struct mcp_mac wol_mac;
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int rc;
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memset(&mb_params, 0, sizeof(mb_params));
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mb_params.cmd = cmd;
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mb_params.param = param;
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/* In case of UNLOAD_DONE, set the primary MAC */
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if ((cmd == DRV_MSG_CODE_UNLOAD_DONE) &&
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(p_hwfn->cdev->wol_config == QED_OV_WOL_ENABLED)) {
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u8 *p_mac = p_hwfn->cdev->wol_mac;
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memset(&wol_mac, 0, sizeof(wol_mac));
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wol_mac.mac_upper = p_mac[0] << 8 | p_mac[1];
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wol_mac.mac_lower = p_mac[2] << 24 | p_mac[3] << 16 |
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p_mac[4] << 8 | p_mac[5];
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DP_VERBOSE(p_hwfn,
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(QED_MSG_SP | NETIF_MSG_IFDOWN),
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"Setting WoL MAC: %pM --> [%08x,%08x]\n",
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p_mac, wol_mac.mac_upper, wol_mac.mac_lower);
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mb_params.p_data_src = &wol_mac;
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mb_params.data_src_size = sizeof(wol_mac);
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}
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rc = qed_mcp_cmd_and_union(p_hwfn, p_ptt, &mb_params);
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if (rc)
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return rc;
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@ -663,6 +643,59 @@ int qed_mcp_load_req(struct qed_hwfn *p_hwfn,
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return 0;
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}
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int qed_mcp_unload_req(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt)
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{
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u32 wol_param, mcp_resp, mcp_param;
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switch (p_hwfn->cdev->wol_config) {
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case QED_OV_WOL_DISABLED:
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wol_param = DRV_MB_PARAM_UNLOAD_WOL_DISABLED;
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break;
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case QED_OV_WOL_ENABLED:
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wol_param = DRV_MB_PARAM_UNLOAD_WOL_ENABLED;
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break;
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default:
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DP_NOTICE(p_hwfn,
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"Unknown WoL configuration %02x\n",
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p_hwfn->cdev->wol_config);
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/* Fallthrough */
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case QED_OV_WOL_DEFAULT:
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wol_param = DRV_MB_PARAM_UNLOAD_WOL_MCP;
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}
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return qed_mcp_cmd(p_hwfn, p_ptt, DRV_MSG_CODE_UNLOAD_REQ, wol_param,
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&mcp_resp, &mcp_param);
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}
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int qed_mcp_unload_done(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt)
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{
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struct qed_mcp_mb_params mb_params;
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struct mcp_mac wol_mac;
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memset(&mb_params, 0, sizeof(mb_params));
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mb_params.cmd = DRV_MSG_CODE_UNLOAD_DONE;
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/* Set the primary MAC if WoL is enabled */
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if (p_hwfn->cdev->wol_config == QED_OV_WOL_ENABLED) {
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u8 *p_mac = p_hwfn->cdev->wol_mac;
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memset(&wol_mac, 0, sizeof(wol_mac));
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wol_mac.mac_upper = p_mac[0] << 8 | p_mac[1];
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wol_mac.mac_lower = p_mac[2] << 24 | p_mac[3] << 16 |
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p_mac[4] << 8 | p_mac[5];
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DP_VERBOSE(p_hwfn,
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(QED_MSG_SP | NETIF_MSG_IFDOWN),
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"Setting WoL MAC: %pM --> [%08x,%08x]\n",
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p_mac, wol_mac.mac_upper, wol_mac.mac_lower);
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mb_params.p_data_src = &wol_mac;
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mb_params.data_src_size = sizeof(wol_mac);
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}
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return qed_mcp_cmd_and_union(p_hwfn, p_ptt, &mb_params);
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}
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static void qed_mcp_handle_vf_flr(struct qed_hwfn *p_hwfn,
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struct qed_ptt *p_ptt)
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{
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@ -592,6 +592,26 @@ int qed_mcp_load_req(struct qed_hwfn *p_hwfn,
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struct qed_ptt *p_ptt,
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u32 *p_load_code);
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/**
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* @brief Sends a UNLOAD_REQ message to the MFW
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*
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* @param p_hwfn
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* @param p_ptt
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*
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* @return int - 0 - Operation was successful.
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*/
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int qed_mcp_unload_req(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt);
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/**
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* @brief Sends a UNLOAD_DONE message to the MFW
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*
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* @param p_hwfn
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* @param p_ptt
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*
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* @return int - 0 - Operation was successful.
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*/
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int qed_mcp_unload_done(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt);
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/**
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* @brief Read the MFW mailbox into Current buffer.
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*
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