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staging: sm750fb: remove dead code

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Remove the code enclosed in '#if 0'

Signed-off-by: Mike Rapoport <mike.rapoport@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Mike Rapoport 2015-09-29 10:47:49 +03:00 committed by Greg Kroah-Hartman
parent 96a384a7ed
commit 1282bade3b
8 changed files with 2 additions and 442 deletions
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53
drivers/staging/sm750fb/ddk750_chip.c
View file

@ -248,17 +248,6 @@ int ddk750_initHw(initchip_param_t *pInitParam)
{
unsigned int ulReg;
#if 0
/* move the code to map regiter function. */
if (getChipType() == SM718) {
/* turn on big endian bit*/
ulReg = PEEK32(0x74);
/* now consider register definition in a big endian pattern*/
POKE32(0x74, ulReg|0x80000000);
}
#endif
if (pInitParam->powerMode != 0)
pInitParam->powerMode = 0;
@ -325,37 +314,6 @@ int ddk750_initHw(initchip_param_t *pInitParam)
ulReg = FIELD_SET(ulReg, ALPHA_DISPLAY_CTRL, PLANE, DISABLE);
POKE32(ALPHA_DISPLAY_CTRL, ulReg);
#if 0
/* Disable LCD hardware cursor, if a former application left it on */
ulReg = PEEK32(PANEL_HWC_ADDRESS);
ulReg = FIELD_SET(ulReg, PANEL_HWC_ADDRESS, ENABLE, DISABLE);
POKE32(PANEL_HWC_ADDRESS, ulReg);
/* Disable CRT hardware cursor, if a former application left it on */
ulReg = PEEK32(CRT_HWC_ADDRESS);
ulReg = FIELD_SET(ulReg, CRT_HWC_ADDRESS, ENABLE, DISABLE);
POKE32(CRT_HWC_ADDRESS, ulReg);
/* Disable ZV Port 0, if a former application left it on */
ulReg = PEEK32(ZV0_CAPTURE_CTRL);
ulReg = FIELD_SET(ulReg, ZV0_CAPTURE_CTRL, CAP, DISABLE);
POKE32(ZV0_CAPTURE_CTRL, ulReg);
/* Disable ZV Port 1, if a former application left it on */
ulReg = PEEK32(ZV1_CAPTURE_CTRL);
ulReg = FIELD_SET(ulReg, ZV1_CAPTURE_CTRL, CAP, DISABLE);
POKE32(ZV1_CAPTURE_CTRL, ulReg);
/* Disable ZV Port Power, if a former application left it on */
enableZVPort(0);
/* Disable DMA Channel, if a former application left it on */
ulReg = PEEK32(DMA_ABORT_INTERRUPT);
ulReg = FIELD_SET(ulReg, DMA_ABORT_INTERRUPT, ABORT_1, ABORT);
POKE32(DMA_ABORT_INTERRUPT, ulReg);
/* Disable i2c */
enableI2C(0);
#endif
/* Disable DMA Channel, if a former application left it on */
ulReg = PEEK32(DMA_ABORT_INTERRUPT);
ulReg = FIELD_SET(ulReg, DMA_ABORT_INTERRUPT, ABORT_1, ABORT);
@ -370,17 +328,6 @@ int ddk750_initHw(initchip_param_t *pInitParam)
return 0;
}
#if 0
unsigned int absDiff(unsigned int a, unsigned int b)
{
if (a > b)
return(a - b);
else
return(b - a);
}
#endif
/*
monk liu @ 4/6/2011:
re-write the calculatePLL function of ddk750.

54
drivers/staging/sm750fb/ddk750_display.h
View file

@ -85,73 +85,19 @@
LCD1 means panel path TFT1 & panel path DVI (so enable DAC)
CRT means crt path DSUB
*/
#if 0
typedef enum _disp_output_t {
NO_DISPLAY = DPMS_OFF,
LCD1_PRI = PNL_2_PRI|PRI_TP_ON|PNL_SEQ_ON|DPMS_OFF|DAC_ON,
LCD1_SEC = PNL_2_SEC|SEC_TP_ON|PNL_SEQ_ON|DPMS_OFF|DAC_ON,
LCD2_PRI = CRT_2_PRI|PRI_TP_ON|DUAL_TFT_ON|DPMS_OFF,
LCD2_SEC = CRT_2_SEC|SEC_TP_ON|DUAL_TFT_ON|DPMS_OFF,
DSUB_PRI = CRT_2_PRI|PRI_TP_ON|DAC_ON,
DSUB_SEC = CRT_2_SEC|SEC_TP_ON|DAC_ON,
LCD1_DSUB_PRI = PNL_2_PRI|PRI_TP_ON|PNL_SEQ_ON|
CRT_2_PRI|SEC_TP_OFF|DAC_ON,
LCD1_DSUB_SEC = PNL_2_SEC|SEC_TP_ON|PNL_SEQ_ON|
CRT_2_SEC|PRI_TP_OFF|DAC_ON,
/* LCD1 show primary and DSUB show secondary */
LCD1_DSUB_DUAL = PNL_2_PRI|PRI_TP_ON|PNL_SEQ_ON|
CRT_2_SEC|SEC_TP_ON|DAC_ON,
/* LCD1 show secondary and DSUB show primary */
LCD1_DSUB_DUAL_SWAP = PNL_2_SEC|SEC_TP_ON|PNL_SEQ_ON|
CRT_2_PRI|PRI_TP_ON|DAC_ON,
LCD1_LCD2_PRI = PNL_2_PRI|PRI_TP_ON|PNL_SEQ_ON|
CRT_2_PRI|SEC_TP_OFF|DPMS_OFF|DUAL_TFT_ON,
LCD1_LCD2_SEC = PNL_2_SEC|SEC_TP_ON|PNL_SEQ_ON|
CRT_2_SEC|PRI_TP_OFF|DPMS_OFF|DUAL_TFT_ON,
LCD1_LCD2_DSUB_PRI = PNL_2_PRI|PRI_TP_ON|PNL_SEQ_ON|DAC_ON|
CRT_2_PRI|SEC_TP_OFF|DPMS_ON|DUAL_TFT_ON,
LCD1_LCD2_DSUB_SEC = PNL_2_SEC|SEC_TP_ON|PNL_SEQ_ON|DAC_ON|
CRT_2_SEC|PRI_TP_OFF|DPMS_ON|DUAL_TFT_ON,
}
disp_output_t;
#else
typedef enum _disp_output_t {
do_LCD1_PRI = PNL_2_PRI|PRI_TP_ON|PNL_SEQ_ON|DAC_ON,
do_LCD1_SEC = PNL_2_SEC|SEC_TP_ON|PNL_SEQ_ON|DAC_ON,
#if 0
do_LCD2_PRI = CRT_2_PRI|PRI_TP_ON,
do_LCD2_SEC = CRT_2_SEC|SEC_TP_ON,
#else
do_LCD2_PRI = CRT_2_PRI|PRI_TP_ON|DUAL_TFT_ON,
do_LCD2_SEC = CRT_2_SEC|SEC_TP_ON|DUAL_TFT_ON,
#endif
/*
do_DSUB_PRI = CRT_2_PRI|PRI_TP_ON|DPMS_ON|DAC_ON,
do_DSUB_SEC = CRT_2_SEC|SEC_TP_ON|DPMS_ON|DAC_ON,
*/
#if 0
do_CRT_PRI = CRT_2_PRI|PRI_TP_ON,
do_CRT_SEC = CRT_2_SEC|SEC_TP_ON,
#else
do_CRT_PRI = CRT_2_PRI|PRI_TP_ON|DPMS_ON|DAC_ON,
do_CRT_SEC = CRT_2_SEC|SEC_TP_ON|DPMS_ON|DAC_ON,
#endif
}
disp_output_t;
#endif
void ddk750_setLogicalDispOut(disp_output_t);
int ddk750_initDVIDisp(void);

9
drivers/staging/sm750fb/ddk750_help.h
View file

@ -8,16 +8,9 @@
#include <asm/uaccess.h>
#include "sm750_help.h"
#if 0
/* if 718 big endian turned on,be aware that don't use this driver for general use,only for ppc big-endian */
#warning "big endian on target cpu and enable nature big endian support of 718 capability !"
#define PEEK32(addr) __raw_readl(mmio750 + addr)
#define POKE32(addr, data) __raw_writel(data, mmio750 + addr)
#else /* software control endianness */
/* software control endianness */
#define PEEK32(addr) readl(addr + mmio750)
#define POKE32(addr, data) writel(data, addr + mmio750)
#endif
extern void __iomem *mmio750;
extern char revId750;

244
drivers/staging/sm750fb/ddk750_reg.h
View file

@ -1836,23 +1836,6 @@
#define CRT_HWC_COLOR_3 0x08023C
#define CRT_HWC_COLOR_3_RGB565 15:0
/* Old Definitions +++. Need to be removed if no application use it. */
#if 0
#define CRT_HWC_COLOR_01 0x080238
#define CRT_HWC_COLOR_01_1_RED 31:27
#define CRT_HWC_COLOR_01_1_GREEN 26:21
#define CRT_HWC_COLOR_01_1_BLUE 20:16
#define CRT_HWC_COLOR_01_0_RED 15:11
#define CRT_HWC_COLOR_01_0_GREEN 10:5
#define CRT_HWC_COLOR_01_0_BLUE 4:0
#define CRT_HWC_COLOR_2 0x08023C
#define CRT_HWC_COLOR_2_RED 15:11
#define CRT_HWC_COLOR_2_GREEN 10:5
#define CRT_HWC_COLOR_2_BLUE 4:0
#endif
/* Old Definitions --- */
/* This vertical expansion below start at 0x080240 ~ 0x080264 */
#define CRT_VERTICAL_EXPANSION 0x080240
#ifndef VALIDATION_CHIP
@ -1891,233 +1874,6 @@
/* Panel Palette register starts at 0x080C00 ~ 0x080FFC */
#define CRT_PALETTE_RAM 0x080C00
/* 2D registers
* move their defination into general lynx_accel.h file
* because all smi graphic chip share the same drawing engine
* register format */
#if 0
#define DE_SOURCE 0x100000
#define DE_SOURCE_WRAP 31:31
#define DE_SOURCE_WRAP_DISABLE 0
#define DE_SOURCE_WRAP_ENABLE 1
/*
* The following definitions are used in different setting
*/
/* Use these definitions in XY addressing mode or linear addressing mode. */
#define DE_SOURCE_X_K1 27:16
#define DE_SOURCE_Y_K2 11:0
/* Use this definition in host write mode for mono. The Y_K2 is not used
in host write mode. */
#define DE_SOURCE_X_K1_MONO 20:16
/* Use these definitions in Bresenham line drawing mode. */
#define DE_SOURCE_X_K1_LINE 29:16
#define DE_SOURCE_Y_K2_LINE 13:0
#define DE_DESTINATION 0x100004
#define DE_DESTINATION_WRAP 31:31
#define DE_DESTINATION_WRAP_DISABLE 0
#define DE_DESTINATION_WRAP_ENABLE 1
#if 1
#define DE_DESTINATION_X 27:16
#define DE_DESTINATION_Y 11:0
#else
#define DE_DESTINATION_X 28:16
#define DE_DESTINATION_Y 15:0
#endif
#define DE_DIMENSION 0x100008
#define DE_DIMENSION_X 28:16
#define DE_DIMENSION_Y_ET 15:0
#define DE_CONTROL 0x10000C
#define DE_CONTROL_STATUS 31:31
#define DE_CONTROL_STATUS_STOP 0
#define DE_CONTROL_STATUS_START 1
#define DE_CONTROL_PATTERN 30:30
#define DE_CONTROL_PATTERN_MONO 0
#define DE_CONTROL_PATTERN_COLOR 1
#define DE_CONTROL_UPDATE_DESTINATION_X 29:29
#define DE_CONTROL_UPDATE_DESTINATION_X_DISABLE 0
#define DE_CONTROL_UPDATE_DESTINATION_X_ENABLE 1
#define DE_CONTROL_QUICK_START 28:28
#define DE_CONTROL_QUICK_START_DISABLE 0
#define DE_CONTROL_QUICK_START_ENABLE 1
#define DE_CONTROL_DIRECTION 27:27
#define DE_CONTROL_DIRECTION_LEFT_TO_RIGHT 0
#define DE_CONTROL_DIRECTION_RIGHT_TO_LEFT 1
#define DE_CONTROL_MAJOR 26:26
#define DE_CONTROL_MAJOR_X 0
#define DE_CONTROL_MAJOR_Y 1
#define DE_CONTROL_STEP_X 25:25
#define DE_CONTROL_STEP_X_POSITIVE 0
#define DE_CONTROL_STEP_X_NEGATIVE 1
#define DE_CONTROL_STEP_Y 24:24
#define DE_CONTROL_STEP_Y_POSITIVE 0
#define DE_CONTROL_STEP_Y_NEGATIVE 1
#define DE_CONTROL_STRETCH 23:23
#define DE_CONTROL_STRETCH_DISABLE 0
#define DE_CONTROL_STRETCH_ENABLE 1
#define DE_CONTROL_HOST 22:22
#define DE_CONTROL_HOST_COLOR 0
#define DE_CONTROL_HOST_MONO 1
#define DE_CONTROL_LAST_PIXEL 21:21
#define DE_CONTROL_LAST_PIXEL_OFF 0
#define DE_CONTROL_LAST_PIXEL_ON 1
#define DE_CONTROL_COMMAND 20:16
#define DE_CONTROL_COMMAND_BITBLT 0
#define DE_CONTROL_COMMAND_RECTANGLE_FILL 1
#define DE_CONTROL_COMMAND_DE_TILE 2
#define DE_CONTROL_COMMAND_TRAPEZOID_FILL 3
#define DE_CONTROL_COMMAND_ALPHA_BLEND 4
#define DE_CONTROL_COMMAND_RLE_STRIP 5
#define DE_CONTROL_COMMAND_SHORT_STROKE 6
#define DE_CONTROL_COMMAND_LINE_DRAW 7
#define DE_CONTROL_COMMAND_HOST_WRITE 8
#define DE_CONTROL_COMMAND_HOST_READ 9
#define DE_CONTROL_COMMAND_HOST_WRITE_BOTTOM_UP 10
#define DE_CONTROL_COMMAND_ROTATE 11
#define DE_CONTROL_COMMAND_FONT 12
#define DE_CONTROL_COMMAND_TEXTURE_LOAD 15
#define DE_CONTROL_ROP_SELECT 15:15
#define DE_CONTROL_ROP_SELECT_ROP3 0
#define DE_CONTROL_ROP_SELECT_ROP2 1
#define DE_CONTROL_ROP2_SOURCE 14:14
#define DE_CONTROL_ROP2_SOURCE_BITMAP 0
#define DE_CONTROL_ROP2_SOURCE_PATTERN 1
#define DE_CONTROL_MONO_DATA 13:12
#define DE_CONTROL_MONO_DATA_NOT_PACKED 0
#define DE_CONTROL_MONO_DATA_8_PACKED 1
#define DE_CONTROL_MONO_DATA_16_PACKED 2
#define DE_CONTROL_MONO_DATA_32_PACKED 3
#define DE_CONTROL_REPEAT_ROTATE 11:11
#define DE_CONTROL_REPEAT_ROTATE_DISABLE 0
#define DE_CONTROL_REPEAT_ROTATE_ENABLE 1
#define DE_CONTROL_TRANSPARENCY_MATCH 10:10
#define DE_CONTROL_TRANSPARENCY_MATCH_OPAQUE 0
#define DE_CONTROL_TRANSPARENCY_MATCH_TRANSPARENT 1
#define DE_CONTROL_TRANSPARENCY_SELECT 9:9
#define DE_CONTROL_TRANSPARENCY_SELECT_SOURCE 0
#define DE_CONTROL_TRANSPARENCY_SELECT_DESTINATION 1
#define DE_CONTROL_TRANSPARENCY 8:8
#define DE_CONTROL_TRANSPARENCY_DISABLE 0
#define DE_CONTROL_TRANSPARENCY_ENABLE 1
#define DE_CONTROL_ROP 7:0
/* Pseudo fields. */
#define DE_CONTROL_SHORT_STROKE_DIR 27:24
#define DE_CONTROL_SHORT_STROKE_DIR_225 0
#define DE_CONTROL_SHORT_STROKE_DIR_135 1
#define DE_CONTROL_SHORT_STROKE_DIR_315 2
#define DE_CONTROL_SHORT_STROKE_DIR_45 3
#define DE_CONTROL_SHORT_STROKE_DIR_270 4
#define DE_CONTROL_SHORT_STROKE_DIR_90 5
#define DE_CONTROL_SHORT_STROKE_DIR_180 8
#define DE_CONTROL_SHORT_STROKE_DIR_0 10
#define DE_CONTROL_ROTATION 25:24
#define DE_CONTROL_ROTATION_0 0
#define DE_CONTROL_ROTATION_270 1
#define DE_CONTROL_ROTATION_90 2
#define DE_CONTROL_ROTATION_180 3
#define DE_PITCH 0x100010
#define DE_PITCH_DESTINATION 28:16
#define DE_PITCH_SOURCE 12:0
#define DE_FOREGROUND 0x100014
#define DE_FOREGROUND_COLOR 31:0
#define DE_BACKGROUND 0x100018
#define DE_BACKGROUND_COLOR 31:0
#define DE_STRETCH_FORMAT 0x10001C
#define DE_STRETCH_FORMAT_PATTERN_XY 30:30
#define DE_STRETCH_FORMAT_PATTERN_XY_NORMAL 0
#define DE_STRETCH_FORMAT_PATTERN_XY_OVERWRITE 1
#define DE_STRETCH_FORMAT_PATTERN_Y 29:27
#define DE_STRETCH_FORMAT_PATTERN_X 25:23
#define DE_STRETCH_FORMAT_PIXEL_FORMAT 21:20
#define DE_STRETCH_FORMAT_PIXEL_FORMAT_8 0
#define DE_STRETCH_FORMAT_PIXEL_FORMAT_16 1
#define DE_STRETCH_FORMAT_PIXEL_FORMAT_32 2
#define DE_STRETCH_FORMAT_ADDRESSING 19:16
#define DE_STRETCH_FORMAT_ADDRESSING_XY 0
#define DE_STRETCH_FORMAT_ADDRESSING_LINEAR 15
#define DE_STRETCH_FORMAT_SOURCE_HEIGHT 11:0
#define DE_COLOR_COMPARE 0x100020
#define DE_COLOR_COMPARE_COLOR 23:0
#define DE_COLOR_COMPARE_MASK 0x100024
#define DE_COLOR_COMPARE_MASK_MASKS 23:0
#define DE_MASKS 0x100028
#define DE_MASKS_BYTE_MASK 31:16
#define DE_MASKS_BIT_MASK 15:0
#define DE_CLIP_TL 0x10002C
#define DE_CLIP_TL_TOP 31:16
#define DE_CLIP_TL_STATUS 13:13
#define DE_CLIP_TL_STATUS_DISABLE 0
#define DE_CLIP_TL_STATUS_ENABLE 1
#define DE_CLIP_TL_INHIBIT 12:12
#define DE_CLIP_TL_INHIBIT_OUTSIDE 0
#define DE_CLIP_TL_INHIBIT_INSIDE 1
#define DE_CLIP_TL_LEFT 11:0
#define DE_CLIP_BR 0x100030
#define DE_CLIP_BR_BOTTOM 31:16
#define DE_CLIP_BR_RIGHT 12:0
#define DE_MONO_PATTERN_LOW 0x100034
#define DE_MONO_PATTERN_LOW_PATTERN 31:0
#define DE_MONO_PATTERN_HIGH 0x100038
#define DE_MONO_PATTERN_HIGH_PATTERN 31:0
#define DE_WINDOW_WIDTH 0x10003C
#define DE_WINDOW_WIDTH_DESTINATION 28:16
#define DE_WINDOW_WIDTH_SOURCE 12:0
#define DE_WINDOW_SOURCE_BASE 0x100040
#define DE_WINDOW_SOURCE_BASE_EXT 27:27
#define DE_WINDOW_SOURCE_BASE_EXT_LOCAL 0
#define DE_WINDOW_SOURCE_BASE_EXT_EXTERNAL 1
#define DE_WINDOW_SOURCE_BASE_CS 26:26
#define DE_WINDOW_SOURCE_BASE_CS_0 0
#define DE_WINDOW_SOURCE_BASE_CS_1 1
#define DE_WINDOW_SOURCE_BASE_ADDRESS 25:0
#define DE_WINDOW_DESTINATION_BASE 0x100044
#define DE_WINDOW_DESTINATION_BASE_EXT 27:27
#define DE_WINDOW_DESTINATION_BASE_EXT_LOCAL 0
#define DE_WINDOW_DESTINATION_BASE_EXT_EXTERNAL 1
#define DE_WINDOW_DESTINATION_BASE_CS 26:26
#define DE_WINDOW_DESTINATION_BASE_CS_0 0
#define DE_WINDOW_DESTINATION_BASE_CS_1 1
#define DE_WINDOW_DESTINATION_BASE_ADDRESS 25:0
#define DE_ALPHA 0x100048
#define DE_ALPHA_VALUE 7:0
#define DE_WRAP 0x10004C
#define DE_WRAP_X 31:16
#define DE_WRAP_Y 15:0
#define DE_STATUS 0x100050
#define DE_STATUS_CSC 1:1
#define DE_STATUS_CSC_CLEAR 0
#define DE_STATUS_CSC_NOT_ACTIVE 0
#define DE_STATUS_CSC_ACTIVE 1
#define DE_STATUS_2D 0:0
#define DE_STATUS_2D_CLEAR 0
#define DE_STATUS_2D_NOT_ACTIVE 0
#define DE_STATUS_2D_ACTIVE 1
#endif
/* Color Space Conversion registers. */
#define CSC_Y_SOURCE_BASE 0x1000C8

5
drivers/staging/sm750fb/ddk750_swi2c.c
View file

@ -90,20 +90,17 @@ static void sw_i2c_wait(void)
* never finish.
* use non-ultimate for loop below is safe
* */
#if 0
/* Change wait algorithm to use PCI bus clock,
it's more reliable than counter loop ..
write 0x61 to 0x3ce and read from 0x3cf
*/
while (peekIO(0x3ce, 0x61) & 0x10);
#else
int i, tmp;
for (i = 0; i < 600; i++) {
tmp = i;
tmp += i;
}
#endif
}
/*

21
drivers/staging/sm750fb/sm750_accel.c
View file

@ -233,20 +233,10 @@ unsigned int rop2) /* ROP value */
*/
write_dpr(accel, DE_WINDOW_DESTINATION_BASE, dBase); /* dpr44 */
#if 0
/* Program pitch (distance between the 1st points of two adjacent lines).
Note that input pitch is BYTE value, but the 2D Pitch register uses
pixel values. Need Byte to pixel conversion.
*/
if (Bpp == 3) {
sx *= 3;
dx *= 3;
width *= 3;
write_dpr(accel, DE_PITCH,
FIELD_VALUE(0, DE_PITCH, DESTINATION, dPitch) |
FIELD_VALUE(0, DE_PITCH, SOURCE, sPitch)); /* dpr10 */
} else
#endif
{
write_dpr(accel, DE_PITCH,
FIELD_VALUE(0, DE_PITCH, DESTINATION, (dPitch/Bpp)) |
@ -344,21 +334,10 @@ int hw_imageblit(struct lynx_accel *accel,
It is an address offset (128 bit aligned) from the beginning of frame buffer.
*/
write_dpr(accel, DE_WINDOW_DESTINATION_BASE, dBase);
#if 0
/* Program pitch (distance between the 1st points of two adjacent lines).
Note that input pitch is BYTE value, but the 2D Pitch register uses
pixel values. Need Byte to pixel conversion.
*/
if (bytePerPixel == 3) {
dx *= 3;
width *= 3;
startBit *= 3;
write_dpr(accel, DE_PITCH,
FIELD_VALUE(0, DE_PITCH, DESTINATION, dPitch) |
FIELD_VALUE(0, DE_PITCH, SOURCE, dPitch)); /* dpr10 */
} else
#endif
{
write_dpr(accel, DE_PITCH,
FIELD_VALUE(0, DE_PITCH, DESTINATION, dPitch/bytePerPixel) |

44
drivers/staging/sm750fb/sm750_cursor.c
View file

@ -129,26 +129,6 @@ void hw_cursor_setData(struct lynx_cursor *cursor,
mask = *pmsk++;
data = 0;
/* either method below works well,
* but method 2 shows no lag
* and method 1 seems a bit wrong*/
#if 0
if (rop == ROP_XOR)
opr = mask ^ color;
else
opr = mask & color;
for (j = 0; j < 8; j++) {
if (opr & (0x80 >> j)) {
/* use fg color,id = 2 */
data |= 2 << (j*2);
} else {
/* use bg color,id = 1 */
data |= 1 << (j*2);
}
}
#else
for (j = 0; j < 8; j++) {
if (mask & (0x80>>j)) {
if (rop == ROP_XOR)
@ -160,15 +140,10 @@ void hw_cursor_setData(struct lynx_cursor *cursor,
data |= ((opr & (0x80>>j))?2:1)<<(j*2);
}
}
#endif
iowrite16(data, pbuffer);
/* assume pitch is 1,2,4,8,...*/
#if 0
if (!((i+1)&(pitch-1))) /* below line equal to is line */
#else
if ((i+1) % pitch == 0)
#endif
{
/* need a return */
pstart += offset;
@ -209,29 +184,10 @@ void hw_cursor_setData2(struct lynx_cursor *cursor,
mask = *pmsk++;
data = 0;
/* either method below works well, but method 2 shows no lag */
#if 0
if (rop == ROP_XOR)
opr = mask ^ color;
else
opr = mask & color;
for (j = 0; j < 8; j++) {
if (opr & (0x80 >> j)) {
/* use fg color,id = 2 */
data |= 2 << (j*2);
} else {
/* use bg color,id = 1 */
data |= 1 << (j*2);
}
}
#else
for (j = 0; j < 8; j++) {
if (mask & (1<<j))
data |= ((color & (1<<j))?1:2)<<(j*2);
}
#endif
iowrite16(data, pbuffer);
/* assume pitch is 1,2,4,8,...*/

14
drivers/staging/sm750fb/sm750_hw.c
View file

@ -77,14 +77,6 @@ int hw_sm750_map(struct lynx_share *share, struct pci_dev *pdev)
share->vidmem_start, share->vidmem_size);
/* reserve the vidmem space of smi adaptor */
#if 0
ret = pci_request_region(pdev, 0, _moduleName_);
if (ret) {
pr_err("Can not request PCI regions.\n");
goto exit;
}
#endif
share->pvMem = ioremap_wc(share->vidmem_start, share->vidmem_size);
if (!share->pvMem) {
@ -124,12 +116,6 @@ int hw_sm750_inithw(struct lynx_share *share, struct pci_dev *pdev)
FIELD_SET(PEEK32(SYSTEM_CTRL), SYSTEM_CTRL, PCI_BURST, ON));
}
/* sm750 use sii164, it can be setup with default value
* by on power, so initDVIDisp can be skipped */
#if 0
ddk750_initDVIDisp();
#endif
if (getChipType() != SM750LE) {
/* does user need CRT ?*/
if (spec_share->state.nocrt) {