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powerpc/eeh: Introduce eeh_ops::err_inject
The patch introduces eeh_ops::err_inject(), which allows to inject specified errors to indicated PE for testing purpose. The functionality isn't support on pSeries platform. On PowerNV, the functionality relies on OPAL API opal_pci_err_inject(). Signed-off-by: Mike Qiu <qiudayu@linux.vnet.ibm.com> Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
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5 changed files with 75 additions and 0 deletions
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@ -204,6 +204,8 @@ struct eeh_ops {
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int (*wait_state)(struct eeh_pe *pe, int max_wait);
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int (*wait_state)(struct eeh_pe *pe, int max_wait);
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int (*get_log)(struct eeh_pe *pe, int severity, char *drv_log, unsigned long len);
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int (*get_log)(struct eeh_pe *pe, int severity, char *drv_log, unsigned long len);
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int (*configure_bridge)(struct eeh_pe *pe);
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int (*configure_bridge)(struct eeh_pe *pe);
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int (*err_inject)(struct eeh_pe *pe, int type, int func,
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unsigned long addr, unsigned long mask);
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int (*read_config)(struct device_node *dn, int where, int size, u32 *val);
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int (*read_config)(struct device_node *dn, int where, int size, u32 *val);
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int (*write_config)(struct device_node *dn, int where, int size, u32 val);
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int (*write_config)(struct device_node *dn, int where, int size, u32 val);
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int (*next_error)(struct eeh_pe **pe);
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int (*next_error)(struct eeh_pe **pe);
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@ -673,6 +673,49 @@ static int ioda_eeh_configure_bridge(struct eeh_pe *pe)
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return 0;
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return 0;
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}
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}
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static int ioda_eeh_err_inject(struct eeh_pe *pe, int type, int func,
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unsigned long addr, unsigned long mask)
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{
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struct pci_controller *hose = pe->phb;
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struct pnv_phb *phb = hose->private_data;
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s64 ret;
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/* Sanity check on error type */
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if (type != OPAL_ERR_INJECT_TYPE_IOA_BUS_ERR &&
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type != OPAL_ERR_INJECT_TYPE_IOA_BUS_ERR64) {
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pr_warn("%s: Invalid error type %d\n",
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__func__, type);
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return -ERANGE;
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}
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if (func < OPAL_ERR_INJECT_FUNC_IOA_LD_MEM_ADDR ||
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func > OPAL_ERR_INJECT_FUNC_IOA_DMA_WR_TARGET) {
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pr_warn("%s: Invalid error function %d\n",
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__func__, func);
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return -ERANGE;
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}
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/* Firmware supports error injection ? */
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if (!opal_check_token(OPAL_PCI_ERR_INJECT)) {
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pr_warn("%s: Firmware doesn't support error injection\n",
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__func__);
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return -ENXIO;
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}
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/* Do error injection */
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ret = opal_pci_err_inject(phb->opal_id, pe->addr,
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type, func, addr, mask);
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if (ret != OPAL_SUCCESS) {
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pr_warn("%s: Failure %lld injecting error "
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"%d-%d to PHB#%x-PE#%x\n",
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__func__, ret, type, func,
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hose->global_number, pe->addr);
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return -EIO;
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}
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return 0;
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}
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static void ioda_eeh_hub_diag_common(struct OpalIoP7IOCErrorData *data)
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static void ioda_eeh_hub_diag_common(struct OpalIoP7IOCErrorData *data)
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{
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{
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/* GEM */
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/* GEM */
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@ -994,5 +1037,6 @@ struct pnv_eeh_ops ioda_eeh_ops = {
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.reset = ioda_eeh_reset,
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.reset = ioda_eeh_reset,
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.get_log = ioda_eeh_get_log,
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.get_log = ioda_eeh_get_log,
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.configure_bridge = ioda_eeh_configure_bridge,
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.configure_bridge = ioda_eeh_configure_bridge,
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.err_inject = ioda_eeh_err_inject,
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.next_error = ioda_eeh_next_error
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.next_error = ioda_eeh_next_error
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};
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};
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@ -358,6 +358,31 @@ static int powernv_eeh_configure_bridge(struct eeh_pe *pe)
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return ret;
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return ret;
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}
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}
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/**
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* powernv_pe_err_inject - Inject specified error to the indicated PE
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* @pe: the indicated PE
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* @type: error type
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* @func: specific error type
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* @addr: address
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* @mask: address mask
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*
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* The routine is called to inject specified error, which is
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* determined by @type and @func, to the indicated PE for
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* testing purpose.
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*/
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static int powernv_eeh_err_inject(struct eeh_pe *pe, int type, int func,
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unsigned long addr, unsigned long mask)
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{
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struct pci_controller *hose = pe->phb;
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struct pnv_phb *phb = hose->private_data;
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int ret = -EEXIST;
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if (phb->eeh_ops && phb->eeh_ops->err_inject)
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ret = phb->eeh_ops->err_inject(pe, type, func, addr, mask);
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return ret;
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}
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/**
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/**
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* powernv_eeh_next_error - Retrieve next EEH error to handle
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* powernv_eeh_next_error - Retrieve next EEH error to handle
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* @pe: Affected PE
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* @pe: Affected PE
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@ -414,6 +439,7 @@ static struct eeh_ops powernv_eeh_ops = {
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.wait_state = powernv_eeh_wait_state,
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.wait_state = powernv_eeh_wait_state,
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.get_log = powernv_eeh_get_log,
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.get_log = powernv_eeh_get_log,
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.configure_bridge = powernv_eeh_configure_bridge,
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.configure_bridge = powernv_eeh_configure_bridge,
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.err_inject = powernv_eeh_err_inject,
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.read_config = pnv_pci_cfg_read,
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.read_config = pnv_pci_cfg_read,
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.write_config = pnv_pci_cfg_write,
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.write_config = pnv_pci_cfg_write,
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.next_error = powernv_eeh_next_error,
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.next_error = powernv_eeh_next_error,
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@ -85,6 +85,8 @@ struct pnv_eeh_ops {
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int (*get_log)(struct eeh_pe *pe, int severity,
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int (*get_log)(struct eeh_pe *pe, int severity,
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char *drv_log, unsigned long len);
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char *drv_log, unsigned long len);
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int (*configure_bridge)(struct eeh_pe *pe);
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int (*configure_bridge)(struct eeh_pe *pe);
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int (*err_inject)(struct eeh_pe *pe, int type, int func,
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unsigned long addr, unsigned long mask);
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int (*next_error)(struct eeh_pe **pe);
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int (*next_error)(struct eeh_pe **pe);
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};
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};
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#endif /* CONFIG_EEH */
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#endif /* CONFIG_EEH */
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@ -731,6 +731,7 @@ static struct eeh_ops pseries_eeh_ops = {
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.wait_state = pseries_eeh_wait_state,
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.wait_state = pseries_eeh_wait_state,
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.get_log = pseries_eeh_get_log,
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.get_log = pseries_eeh_get_log,
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.configure_bridge = pseries_eeh_configure_bridge,
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.configure_bridge = pseries_eeh_configure_bridge,
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.err_inject = NULL,
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.read_config = pseries_eeh_read_config,
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.read_config = pseries_eeh_read_config,
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.write_config = pseries_eeh_write_config,
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.write_config = pseries_eeh_write_config,
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.next_error = NULL,
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.next_error = NULL,
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