mirrors
/
linux-stable
mirror of https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
1
0
Fork 0
Code Issues Releases Wiki Activity

Renesas ARM DT updates for v5.20 (take two) 

- Ethernet MAC and switch support for the RZ/N1 SoC on the RZN1D-DB
     development board,
   - AA1024XD12 panel overlay support for the Draak, Ebisu, and
     Salvator-X(S) development boards,
   - Miscellaneous fixes and improvements.
 -----BEGIN PGP SIGNATURE-----
 
 iHUEABYIAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCYsfxkAAKCRCKwlD9ZEnx
 cGKNAQC5Wl91yn3heD50V0vXjs6CqNm/bdrWOEmnwwlcnyClqQEAnQjTHs4iriar
 110WP2JSNUoZwawygZFq0jHBgMVFOQA=
 =LnAY
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmLIF6MACgkQmmx57+YA
 GNkxQw//ZHD0LKpT4v1C1o1y4MNuVujljbC/uS9Wk+vhYuWebo0OKAu8CEyAwoVO
 SsnYuNpzjLiMlbDc+Id+9C9IbF2k97hUJWDJWMOLF2wtESRtAwkoYHiJToMH9216
 zUxrFpah4LAMKDwPxOqLvBl9/5Hzy4L7tfslmQijiupfGGF6gWiWrA+kgBXpX9+L
 Y1H9PdTd+XLuqmXXa3o+RA0n8d6ZlYxYAJ73OC6nXhr/fd2dpmS/nYtchM3AeLVp
 QAJSf9NnJQPm17G+6TvBHOIOBjyCSsLWemNEbXPkyW3X/H/LCz1RyEeU0fy0B4eu
 wzEwLd/YveEh8WX/l+r8g6gF8OjzzXoQvFIAe4lfXvkUhwFohiCQuBXI34TBzCzb
 fGUKJohs6GSrjKRskIJzaojuaHuKMIlX3+Ynx8XoJqczbWZpqdMs+xTFBnNk8HGH
 lYLsX+rlphZhPeTPQNT2Q7eEnH3skTzBG2Hmhy/2kpZMxtV/epdMt/+BRSRsa/Rp
 LKAL+npYkF9m8Xn0HyWCh2gEpWTHnBOGG/8O7XaPQpJxEfKgCncBjRWGlJlze4Gh
 zRJmfE4OyqhHnXmbpgRNglZjNtiq+z3L7vKLwFYYpvL3lcZtzr75vGpBCt+wyQMf
 b2ZXUPVG0h7bIOuf6RvYYKkNgEePuLyXlAWuhaTdskoDUrQy2EA=
 =wgc5
 -----END PGP SIGNATURE-----

Merge tag 'renesas-arm-dt-for-v5.20-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dt

Renesas ARM DT updates for v5.20 (take two)

  - Ethernet MAC and switch support for the RZ/N1 SoC on the RZN1D-DB
    development board,
  - AA1024XD12 panel overlay support for the Draak, Ebisu, and
    Salvator-X(S) development boards,
  - Miscellaneous fixes and improvements.

* tag 'renesas-arm-dt-for-v5.20-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
  arm64: dts: renesas: Add panel overlay for Draak and Ebisu boards
  arm64: dts: renesas: Add panel overlay for Salvator-X(S) boards
  arm64: dts: renesas: Prepare AA1024XD12 panel .dtsi for overlay support
  arm64: dts: renesas: spider-cpu: Fix scif0/scif3 sort order
  ARM: dts: r9a06g032-rzn1d400-db: Add switch description
  dt-bindings: net: pcs: add bindings for Renesas RZ/N1 MII converter
  ARM: dts: r9a06g032: Describe switch
  ARM: dts: r9a06g032: Describe GMAC2
  ARM: dts: r9a06g032: Describe MII converter
  arm64: dts: renesas: r9a07g054l2-smarc: Correct SoC name in comment
  ARM: dts: renesas: Fix DA9063 watchdog subnode names
  arm64: dts: renesas: r8a779m8: Drop operating points above 1.5 GHz

Link: https://lore.kernel.org/r/cover.1657278845.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2022-07-08 13:40:17 +02:00
parent d67fe5e3b2 fec6d133ce
commit 132582d210
20 changed files with 555 additions and 57 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

171
Documentation/devicetree/bindings/net/pcs/renesas,rzn1-miic.yaml Normal file
View File

@ -0,0 +1,171 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/net/pcs/renesas,rzn1-miic.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Renesas RZ/N1 MII converter
maintainers:
- Clément Léger <clement.leger@bootlin.com>
description: |
This MII converter is present on the Renesas RZ/N1 SoC family. It is
responsible to do MII passthrough or convert it to RMII/RGMII.
properties:
'#address-cells':
const: 1
'#size-cells':
const: 0
compatible:
items:
- enum:
- renesas,r9a06g032-miic
- const: renesas,rzn1-miic
reg:
maxItems: 1
clocks:
items:
- description: MII reference clock
- description: RGMII reference clock
- description: RMII reference clock
- description: AHB clock used for the MII converter register interface
clock-names:
items:
- const: mii_ref
- const: rgmii_ref
- const: rmii_ref
- const: hclk
renesas,miic-switch-portin:
description: MII Switch PORTIN configuration. This value should use one of
the values defined in dt-bindings/net/pcs-rzn1-miic.h.
$ref: /schemas/types.yaml#/definitions/uint32
enum: [1, 2]
power-domains:
maxItems: 1
patternProperties:
"^mii-conv@[0-5]$":
type: object
description: MII converter port
properties:
reg:
description: MII Converter port number.
enum: [1, 2, 3, 4, 5]
renesas,miic-input:
description: Converter input port configuration. This value should use
one of the values defined in dt-bindings/net/pcs-rzn1-miic.h.
$ref: /schemas/types.yaml#/definitions/uint32
required:
- reg
- renesas,miic-input
additionalProperties: false
allOf:
- if:
properties:
reg:
const: 1
then:
properties:
renesas,miic-input:
const: 0
- if:
properties:
reg:
const: 2
then:
properties:
renesas,miic-input:
enum: [1, 11]
- if:
properties:
reg:
const: 3
then:
properties:
renesas,miic-input:
enum: [7, 10]
- if:
properties:
reg:
const: 4
then:
properties:
renesas,miic-input:
enum: [4, 6, 9, 13]
- if:
properties:
reg:
const: 5
then:
properties:
renesas,miic-input:
enum: [3, 5, 8, 12]
required:
- '#address-cells'
- '#size-cells'
- compatible
- reg
- clocks
- clock-names
- power-domains
additionalProperties: false
examples:
- |
#include <dt-bindings/net/pcs-rzn1-miic.h>
#include <dt-bindings/clock/r9a06g032-sysctrl.h>
eth-miic@44030000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "renesas,r9a06g032-miic", "renesas,rzn1-miic";
reg = <0x44030000 0x10000>;
clocks = <&sysctrl R9A06G032_CLK_MII_REF>,
<&sysctrl R9A06G032_CLK_RGMII_REF>,
<&sysctrl R9A06G032_CLK_RMII_REF>,
<&sysctrl R9A06G032_HCLK_SWITCH_RG>;
clock-names = "mii_ref", "rgmii_ref", "rmii_ref", "hclk";
renesas,miic-switch-portin = <MIIC_GMAC2_PORT>;
power-domains = <&sysctrl>;
mii_conv1: mii-conv@1 {
renesas,miic-input = <MIIC_GMAC1_PORT>;
reg = <1>;
};
mii_conv2: mii-conv@2 {
renesas,miic-input = <MIIC_SWITCH_PORTD>;
reg = <2>;
};
mii_conv3: mii-conv@3 {
renesas,miic-input = <MIIC_SWITCH_PORTC>;
reg = <3>;
};
mii_conv4: mii-conv@4 {
renesas,miic-input = <MIIC_SWITCH_PORTB>;
reg = <4>;
};
mii_conv5: mii-conv@5 {
renesas,miic-input = <MIIC_SWITCH_PORTA>;
reg = <5>;
};
};

2
arch/arm/boot/dts/r8a7790-lager.dts
View File

@ -442,7 +442,7 @@
compatible = "dlg,da9063-rtc";
};
wdt {
watchdog {
compatible = "dlg,da9063-watchdog";
};
};

2
arch/arm/boot/dts/r8a7790-stout.dts
View File

@ -341,7 +341,7 @@
compatible = "dlg,da9063-rtc";
};
wdt {
watchdog {
compatible = "dlg,da9063-watchdog";
};
};

2
arch/arm/boot/dts/r8a7791-koelsch.dts
View File

@ -805,7 +805,7 @@
compatible = "dlg,da9063-rtc";
};
wdt {
watchdog {
compatible = "dlg,da9063-watchdog";
};
};

2
arch/arm/boot/dts/r8a7791-porter.dts
View File

@ -390,7 +390,7 @@
interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
interrupt-controller;
wdt {
watchdog {
compatible = "dlg,da9063-watchdog";
};
};

2
arch/arm/boot/dts/r8a7792-blanche.dts
View File

@ -335,7 +335,7 @@
compatible = "dlg,da9063-rtc";
};
wdt {
watchdog {
compatible = "dlg,da9063-watchdog";
};
};

2
arch/arm/boot/dts/r8a7793-gose.dts
View File

@ -740,7 +740,7 @@
compatible = "dlg,da9063-rtc";
};
wdt {
watchdog {
compatible = "dlg,da9063-watchdog";
};
};

2
arch/arm/boot/dts/r8a7794-alt.dts
View File

@ -463,7 +463,7 @@
compatible = "dlg,da9063-rtc";
};
wdt {
watchdog {
compatible = "dlg,da9063-watchdog";
};
};

2
arch/arm/boot/dts/r8a7794-silk.dts
View File

@ -433,7 +433,7 @@
compatible = "dlg,da9063-rtc";
};
wdt {
watchdog {
compatible = "dlg,da9063-watchdog";
};
};

39
arch/arm/boot/dts/r8a77xx-aa104xd12-panel.dtsi
View File

@ -1,39 +0,0 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Common file for the AA104XD12 panel connected to Renesas R-Car boards
*
* Copyright (C) 2014 Renesas Electronics Corp.
*/
/ {
panel {
compatible = "mitsubishi,aa104xd12", "panel-lvds";
width-mm = <210>;
height-mm = <158>;
data-mapping = "jeida-18";
panel-timing {
/* 1024x768 @65Hz */
clock-frequency = <65000000>;
hactive = <1024>;
vactive = <768>;
hsync-len = <136>;
hfront-porch = <20>;
hback-porch = <160>;
vfront-porch = <3>;
vback-porch = <29>;
vsync-len = <6>;
};
port {
panel_in: endpoint {
remote-endpoint = <&lvds_connector>;
};
};
};
};
&lvds_connector {
remote-endpoint = <&panel_in>;
};

115
arch/arm/boot/dts/r9a06g032-rzn1d400-db.dts
View File

@ -8,6 +8,9 @@
/dts-v1/;
#include <dt-bindings/pinctrl/rzn1-pinctrl.h>
#include <dt-bindings/net/pcs-rzn1-miic.h>
#include "r9a06g032.dtsi"
/ {
@ -23,10 +26,122 @@
};
};
&eth_miic {
status = "okay";
renesas,miic-switch-portin = <MIIC_GMAC2_PORT>;
};
&gmac2 {
status = "okay";
phy-mode = "gmii";
fixed-link {
speed = <1000>;
full-duplex;
};
};
&mii_conv4 {
renesas,miic-input = <MIIC_SWITCH_PORTB>;
status = "okay";
};
&mii_conv5 {
renesas,miic-input = <MIIC_SWITCH_PORTA>;
status = "okay";
};
&pinctrl{
pins_eth3: pins_eth3 {
pinmux = <RZN1_PINMUX(36, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
<RZN1_PINMUX(37, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
<RZN1_PINMUX(38, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
<RZN1_PINMUX(39, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
<RZN1_PINMUX(40, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
<RZN1_PINMUX(41, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
<RZN1_PINMUX(42, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
<RZN1_PINMUX(43, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
<RZN1_PINMUX(44, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
<RZN1_PINMUX(45, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
<RZN1_PINMUX(46, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
<RZN1_PINMUX(47, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>;
drive-strength = <6>;
bias-disable;
};
pins_eth4: pins_eth4 {
pinmux = <RZN1_PINMUX(48, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
<RZN1_PINMUX(49, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
<RZN1_PINMUX(50, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
<RZN1_PINMUX(51, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
<RZN1_PINMUX(52, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
<RZN1_PINMUX(53, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
<RZN1_PINMUX(54, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
<RZN1_PINMUX(55, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
<RZN1_PINMUX(56, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
<RZN1_PINMUX(57, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
<RZN1_PINMUX(58, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
<RZN1_PINMUX(59, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>;
drive-strength = <6>;
bias-disable;
};
pins_mdio1: pins_mdio1 {
pinmux = <RZN1_PINMUX(152, RZN1_FUNC_MDIO1_SWITCH)>,
<RZN1_PINMUX(153, RZN1_FUNC_MDIO1_SWITCH)>;
};
};
&rtc0 {
status = "okay";
};
&switch {
status = "okay";
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&pins_eth3>, <&pins_eth4>, <&pins_mdio1>;
dsa,member = <0 0>;
mdio {
clock-frequency = <2500000>;
#address-cells = <1>;
#size-cells = <0>;
switch0phy4: ethernet-phy@4 {
reg = <4>;
micrel,led-mode = <1>;
};
switch0phy5: ethernet-phy@5 {
reg = <5>;
micrel,led-mode = <1>;
};
};
};
&switch_port0 {
label = "lan0";
phy-mode = "mii";
phy-handle = <&switch0phy5>;
status = "okay";
};
&switch_port1 {
label = "lan1";
phy-mode = "mii";
phy-handle = <&switch0phy4>;
status = "okay";
};
&switch_port4 {
status = "okay";
};
&uart0 {
status = "okay";
};

108
arch/arm/boot/dts/r9a06g032.dtsi
View File

@ -304,6 +304,114 @@
data-width = <8>;
};
gmac2: ethernet@44002000 {
compatible = "renesas,r9a06g032-gmac", "renesas,rzn1-gmac", "snps,dwmac";
reg = <0x44002000 0x2000>;
interrupt-parent = <&gic>;
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "macirq", "eth_wake_irq", "eth_lpi";
clocks = <&sysctrl R9A06G032_HCLK_GMAC1>;
clock-names = "stmmaceth";
power-domains = <&sysctrl>;
snps,multicast-filter-bins = <256>;
snps,perfect-filter-entries = <128>;
tx-fifo-depth = <2048>;
rx-fifo-depth = <4096>;
status = "disabled";
};
eth_miic: eth-miic@44030000 {
compatible = "renesas,r9a06g032-miic", "renesas,rzn1-miic";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x44030000 0x10000>;
clocks = <&sysctrl R9A06G032_CLK_MII_REF>,
<&sysctrl R9A06G032_CLK_RGMII_REF>,
<&sysctrl R9A06G032_CLK_RMII_REF>,
<&sysctrl R9A06G032_HCLK_SWITCH_RG>;
clock-names = "mii_ref", "rgmii_ref", "rmii_ref", "hclk";
power-domains = <&sysctrl>;
status = "disabled";
mii_conv1: mii-conv@1 {
reg = <1>;
status = "disabled";
};
mii_conv2: mii-conv@2 {
reg = <2>;
status = "disabled";
};
mii_conv3: mii-conv@3 {
reg = <3>;
status = "disabled";
};
mii_conv4: mii-conv@4 {
reg = <4>;
status = "disabled";
};
mii_conv5: mii-conv@5 {
reg = <5>;
status = "disabled";
};
};
switch: switch@44050000 {
compatible = "renesas,r9a06g032-a5psw", "renesas,rzn1-a5psw";
reg = <0x44050000 0x10000>;
clocks = <&sysctrl R9A06G032_HCLK_SWITCH>,
<&sysctrl R9A06G032_CLK_SWITCH>;
clock-names = "hclk", "clk";
power-domains = <&sysctrl>;
status = "disabled";
ethernet-ports {
#address-cells = <1>;
#size-cells = <0>;
switch_port0: port@0 {
reg = <0>;
pcs-handle = <&mii_conv5>;
status = "disabled";
};
switch_port1: port@1 {
reg = <1>;
pcs-handle = <&mii_conv4>;
status = "disabled";
};
switch_port2: port@2 {
reg = <2>;
pcs-handle = <&mii_conv3>;
status = "disabled";
};
switch_port3: port@3 {
reg = <3>;
pcs-handle = <&mii_conv2>;
status = "disabled";
};
switch_port4: port@4 {
reg = <4>;
ethernet = <&gmac2>;
label = "cpu";
phy-mode = "internal";
status = "disabled";
fixed-link {
speed = <1000>;
full-duplex;
};
};
};
};
gic: interrupt-controller@44101000 {
compatible = "arm,gic-400", "arm,cortex-a7-gic";
interrupt-controller;

3
arch/arm64/boot/dts/renesas/Makefile
View File

@ -85,3 +85,6 @@ dtb-$(CONFIG_ARCH_R9A07G044) += r9a07g044l2-smarc.dtb
dtb-$(CONFIG_ARCH_R9A07G054) += r9a07g054l2-smarc.dtb
dtb-$(CONFIG_ARCH_R9A09G011) += r9a09g011-v2mevk2.dtb
dtb-$(CONFIG_ARCH_RCAR_GEN3) += draak-ebisu-panel-aa104xd12.dtbo
dtb-$(CONFIG_ARCH_RCAR_GEN3) += salvator-panel-aa104xd12.dtbo

36
arch/arm64/boot/dts/renesas/draak-ebisu-panel-aa104xd12.dts Normal file
View File

@ -0,0 +1,36 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Device Tree overlay for the AA104XD12 panel connected to LVDS1 on a Draak or
* Ebisu board
*
* Copyright 2021 Ideas on Board Oy
*/
/dts-v1/;
/plugin/;
&{/} {
#include "panel-aa104xd12.dtsi"
};
&{/panel} {
backlight = <&backlight>;
port {
panel_in: endpoint {
remote-endpoint = <&lvds1_out>;
};
};
};
&lvds1 {
status = "okay";
ports {
port@1 {
lvds1_out: endpoint {
remote-endpoint = <&panel_in>;
};
};
};
};

30
arch/arm64/boot/dts/renesas/panel-aa104xd12.dtsi Normal file
View File

@ -0,0 +1,30 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Common file for the AA104XD12 panel connected to Renesas R-Car Gen3 boards.
*
* Copyright (C) 2014 Renesas Electronics Corp.
*/
panel {
compatible = "mitsubishi,aa104xd12", "panel-lvds";
width-mm = <210>;
height-mm = <158>;
data-mapping = "jeida-18";
panel-timing {
/* 1024x768 @65Hz */
clock-frequency = <65000000>;
hactive = <1024>;
vactive = <768>;
hsync-len = <136>;
hfront-porch = <20>;
hback-porch = <160>;
vfront-porch = <3>;
vback-porch = <29>;
vsync-len = <6>;
};
port {
};
};

18
arch/arm64/boot/dts/renesas/r8a779f0-spider-cpu.dtsi
View File

@ -55,16 +55,16 @@
function = "i2c4";
};
scif3_pins: scif3 {
groups = "scif3_data", "scif3_ctrl";
function = "scif3";
};
scif0_pins: scif0 {
groups = "scif0_data", "scif0_ctrl";
function = "scif0";
};
scif3_pins: scif3 {
groups = "scif3_data", "scif3_ctrl";
function = "scif3";
};
scif_clk_pins: scif_clk {
groups = "scif_clk";
function = "scif_clk";
@ -76,16 +76,16 @@
status = "okay";
};
&scif3 {
pinctrl-0 = <&scif3_pins>;
&scif0 {
pinctrl-0 = <&scif0_pins>;
pinctrl-names = "default";
uart-has-rtscts;
status = "okay";
};
&scif0 {
pinctrl-0 = <&scif0_pins>;
&scif3 {
pinctrl-0 = <&scif3_pins>;
pinctrl-names = "default";
uart-has-rtscts;

5
arch/arm64/boot/dts/renesas/r8a779m8.dtsi
View File

@ -10,3 +10,8 @@
/ {
compatible = "renesas,r8a779m8", "renesas,r8a7795";
};
&cluster0_opp {
/delete-node/ opp-1600000000;
/delete-node/ opp-1700000000;
};

2
arch/arm64/boot/dts/renesas/r9a07g054l2-smarc.dts
View File

@ -1,6 +1,6 @@
// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
/*
* Device Tree Source for the RZ/G2L SMARC EVK board
* Device Tree Source for the RZ/V2L SMARC EVK board
*
* Copyright (C) 2021 Renesas Electronics Corp.
*/

36
arch/arm64/boot/dts/renesas/salvator-panel-aa104xd12.dts Normal file
View File

@ -0,0 +1,36 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Device Tree overlay for the AA104XD12 panel connected to LVDS0 on a
* Salvator-X or Salvator-XS board
*
* Copyright 2021 Ideas on Board Oy
*/
/dts-v1/;
/plugin/;
&{/} {
#include "panel-aa104xd12.dtsi"
};
&{/panel} {
backlight = <&backlight>;
port {
panel_in: endpoint {
remote-endpoint = <&lvds0_out>;
};
};
};
&lvds0 {
status = "okay";
ports {
port@1 {
lvds0_out: endpoint {
remote-endpoint = <&panel_in>;
};
};
};
};

33
include/dt-bindings/net/pcs-rzn1-miic.h Normal file
View File

@ -0,0 +1,33 @@
/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
/*
* Copyright (C) 2022 Schneider-Electric
*
* Clément Léger <clement.leger@bootlin.com>
*/
#ifndef _DT_BINDINGS_PCS_RZN1_MIIC
#define _DT_BINDINGS_PCS_RZN1_MIIC
/*
* Reefer to the datasheet [1] section 8.2.1, Internal Connection of Ethernet
* Ports to check the available combination
*
* [1] REN_r01uh0750ej0140-rzn1-introduction_MAT_20210228.pdf
*/
#define MIIC_GMAC1_PORT 0
#define MIIC_GMAC2_PORT 1
#define MIIC_RTOS_PORT 2
#define MIIC_SERCOS_PORTA 3
#define MIIC_SERCOS_PORTB 4
#define MIIC_ETHERCAT_PORTA 5
#define MIIC_ETHERCAT_PORTB 6
#define MIIC_ETHERCAT_PORTC 7
#define MIIC_SWITCH_PORTA 8
#define MIIC_SWITCH_PORTB 9
#define MIIC_SWITCH_PORTC 10
#define MIIC_SWITCH_PORTD 11
#define MIIC_HSR_PORTA 12
#define MIIC_HSR_PORTB 13
#endif