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ath5k: use bit shift operators for cache line size
This matches ath9k, providing consistency when reading both drivers. Signed-off-by: Luis R. Rodriguez <lrodriguez@atheros.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
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1 changed files with 2 additions and 2 deletions
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@ -471,7 +471,7 @@ ath5k_pci_probe(struct pci_dev *pdev,
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* DMA to work so force a reasonable value here if it
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* comes up zero.
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*/
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csz = L1_CACHE_BYTES / sizeof(u32);
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csz = L1_CACHE_BYTES >> 2;
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pci_write_config_byte(pdev, PCI_CACHE_LINE_SIZE, csz);
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}
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/*
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@ -544,7 +544,7 @@ ath5k_pci_probe(struct pci_dev *pdev,
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__set_bit(ATH_STAT_INVALID, sc->status);
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sc->iobase = mem; /* So we can unmap it on detach */
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sc->common.cachelsz = csz * sizeof(u32); /* convert to bytes */
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sc->common.cachelsz = csz << 2; /* convert to bytes */
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sc->opmode = NL80211_IFTYPE_STATION;
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sc->bintval = 1000;
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mutex_init(&sc->lock);
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