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KVM: PPC: Book3S HV: Add new capability to control MCE behaviour
This introduces a new KVM capability to control how KVM behaves on machine check exception (MCE) in HV KVM guests. If this capability has not been enabled, KVM redirects machine check exceptions to guest's 0x200 vector, if the address in error belongs to the guest. With this capability enabled, KVM will cause a guest exit with the exit reason indicating an NMI. The new capability is required to avoid problems if a new kernel/KVM is used with an old QEMU, running a guest that doesn't issue "ibm,nmi-register". As old QEMU does not understand the NMI exit type, it treats it as a fatal error. However, the guest could have handled the machine check error if the exception was delivered to guest's 0x200 interrupt vector instead of NMI exit in case of old QEMU. [paulus@ozlabs.org - Reworded the commit message to be clearer, enable only on HV KVM.] Signed-off-by: Aravinda Prasad <aravinda@linux.vnet.ibm.com> Reviewed-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Mahesh Salgaonkar <mahesh@linux.vnet.ibm.com> Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
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5 changed files with 28 additions and 0 deletions
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@ -4011,6 +4011,17 @@ vsmt_mode being returned when the KVM_CAP_PPC_SMT capability is
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subsequently queried for the VM. This capability is only supported by
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subsequently queried for the VM. This capability is only supported by
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HV KVM, and can only be set before any VCPUs have been created.
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HV KVM, and can only be set before any VCPUs have been created.
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7.12 KVM_CAP_PPC_FWNMI
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Architectures: ppc
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Parameters: none
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With this capability a machine check exception in the guest address
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space will cause KVM to exit the guest with NMI exit reason. This
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enables QEMU to build error log and branch to guest kernel registered
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machine check handling routine. Without this capability KVM will
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branch to guests' 0x200 interrupt vector.
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8. Other capabilities.
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8. Other capabilities.
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----------------------
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----------------------
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@ -287,6 +287,7 @@ struct kvm_arch {
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cpumask_t need_tlb_flush;
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cpumask_t need_tlb_flush;
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cpumask_t cpu_in_guest;
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cpumask_t cpu_in_guest;
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u8 radix;
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u8 radix;
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u8 fwnmi_enabled;
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pgd_t *pgtable;
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pgd_t *pgtable;
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u64 process_table;
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u64 process_table;
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struct dentry *debugfs_dir;
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struct dentry *debugfs_dir;
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@ -485,6 +485,7 @@ int main(void)
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OFFSET(KVM_ENABLED_HCALLS, kvm, arch.enabled_hcalls);
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OFFSET(KVM_ENABLED_HCALLS, kvm, arch.enabled_hcalls);
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OFFSET(KVM_VRMA_SLB_V, kvm, arch.vrma_slb_v);
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OFFSET(KVM_VRMA_SLB_V, kvm, arch.vrma_slb_v);
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OFFSET(KVM_RADIX, kvm, arch.radix);
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OFFSET(KVM_RADIX, kvm, arch.radix);
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OFFSET(KVM_FWNMI, kvm, arch.fwnmi_enabled);
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OFFSET(VCPU_DSISR, kvm_vcpu, arch.shregs.dsisr);
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OFFSET(VCPU_DSISR, kvm_vcpu, arch.shregs.dsisr);
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OFFSET(VCPU_DAR, kvm_vcpu, arch.shregs.dar);
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OFFSET(VCPU_DAR, kvm_vcpu, arch.shregs.dar);
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OFFSET(VCPU_VPA, kvm_vcpu, arch.vpa.pinned_addr);
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OFFSET(VCPU_VPA, kvm_vcpu, arch.vpa.pinned_addr);
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@ -623,6 +623,11 @@ int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
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/* Disable this on POWER9 until code handles new HPTE format */
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/* Disable this on POWER9 until code handles new HPTE format */
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r = !!hv_enabled && !cpu_has_feature(CPU_FTR_ARCH_300);
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r = !!hv_enabled && !cpu_has_feature(CPU_FTR_ARCH_300);
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break;
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break;
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#endif
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#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
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case KVM_CAP_PPC_FWNMI:
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r = hv_enabled;
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break;
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#endif
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#endif
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case KVM_CAP_PPC_HTM:
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case KVM_CAP_PPC_HTM:
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r = cpu_has_feature(CPU_FTR_TM_COMP) &&
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r = cpu_has_feature(CPU_FTR_TM_COMP) &&
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@ -1543,6 +1548,15 @@ static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu,
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break;
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break;
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}
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}
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#endif /* CONFIG_KVM_XICS */
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#endif /* CONFIG_KVM_XICS */
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#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
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case KVM_CAP_PPC_FWNMI:
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r = -EINVAL;
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if (!is_kvmppc_hv_enabled(vcpu->kvm))
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break;
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r = 0;
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vcpu->kvm->arch.fwnmi_enabled = true;
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break;
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#endif /* CONFIG_KVM_BOOK3S_HV_POSSIBLE */
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default:
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default:
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r = -EINVAL;
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r = -EINVAL;
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break;
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break;
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@ -895,6 +895,7 @@ struct kvm_ppc_resize_hpt {
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#define KVM_CAP_SPAPR_TCE_VFIO 142
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#define KVM_CAP_SPAPR_TCE_VFIO 142
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#define KVM_CAP_X86_GUEST_MWAIT 143
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#define KVM_CAP_X86_GUEST_MWAIT 143
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#define KVM_CAP_ARM_USER_IRQ 144
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#define KVM_CAP_ARM_USER_IRQ 144
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#define KVM_CAP_PPC_FWNMI 145
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#ifdef KVM_CAP_IRQ_ROUTING
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#ifdef KVM_CAP_IRQ_ROUTING
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