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[ARM] 3036/1: AAEC-2000 - Add defines for GPIO registers
Patch from Bellido Nicolas Add defines for GPIO registers on the AAEC-2000 processor. Signed-off-by: Nicolas Bellido <ml@acolin.be> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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@ -17,6 +17,13 @@
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#error You must include hardware.h not this file
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#endif /* __ASM_ARCH_HARDWARE_H */
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/* Chip selects */
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#define AAEC_CS0 0x00000000
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#define AAEC_CS1 0x10000000
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#define AAEC_CS2 0x20000000
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#define AAEC_CS3 0x30000000
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/* Interrupt controller */
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#define IRQ_BASE __REG(0x80000500)
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#define IRQ_INTSR __REG(0x80000500) /* Int Status Register */
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@ -148,4 +155,47 @@
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#define POWER_STFCLR __REG(0x8000041c) /* NbFlg, RSTFlg, PFFlg, CLDFlg Clear */
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#define POWER_CLKSET __REG(0x80000420) /* Clock Speed Control */
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/* GPIO Registers */
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#define AAEC_GPIO_PHYS 0x80000e00
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#define AAEC_GPIO_PADR __REG(AAEC_GPIO_PHYS + 0x00)
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#define AAEC_GPIO_PBDR __REG(AAEC_GPIO_PHYS + 0x04)
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#define AAEC_GPIO_PCDR __REG(AAEC_GPIO_PHYS + 0x08)
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#define AAEC_GPIO_PDDR __REG(AAEC_GPIO_PHYS + 0x0c)
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#define AAEC_GPIO_PADDR __REG(AAEC_GPIO_PHYS + 0x10)
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#define AAEC_GPIO_PBDDR __REG(AAEC_GPIO_PHYS + 0x14)
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#define AAEC_GPIO_PCDDR __REG(AAEC_GPIO_PHYS + 0x18)
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#define AAEC_GPIO_PDDDR __REG(AAEC_GPIO_PHYS + 0x1c)
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#define AAEC_GPIO_PEDR __REG(AAEC_GPIO_PHYS + 0x20)
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#define AAEC_GPIO_PEDDR __REG(AAEC_GPIO_PHYS + 0x24)
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#define AAEC_GPIO_KSCAN __REG(AAEC_GPIO_PHYS + 0x28)
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#define AAEC_GPIO_PINMUX __REG(AAEC_GPIO_PHYS + 0x2c)
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#define AAEC_GPIO_PFDR __REG(AAEC_GPIO_PHYS + 0x30)
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#define AAEC_GPIO_PFDDR __REG(AAEC_GPIO_PHYS + 0x34)
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#define AAEC_GPIO_PGDR __REG(AAEC_GPIO_PHYS + 0x38)
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#define AAEC_GPIO_PGDDR __REG(AAEC_GPIO_PHYS + 0x3c)
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#define AAEC_GPIO_PHDR __REG(AAEC_GPIO_PHYS + 0x40)
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#define AAEC_GPIO_PHDDR __REG(AAEC_GPIO_PHYS + 0x44)
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#define AAEC_GPIO_RAZ __REG(AAEC_GPIO_PHYS + 0x48)
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#define AAEC_GPIO_INTTYPE1 __REG(AAEC_GPIO_PHYS + 0x4c)
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#define AAEC_GPIO_INTTYPE2 __REG(AAEC_GPIO_PHYS + 0x50)
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#define AAEC_GPIO_FEOI __REG(AAEC_GPIO_PHYS + 0x54)
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#define AAEC_GPIO_INTEN __REG(AAEC_GPIO_PHYS + 0x58)
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#define AAEC_GPIO_INTSTATUS __REG(AAEC_GPIO_PHYS + 0x5c)
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#define AAEC_GPIO_RAWINTSTATUS __REG(AAEC_GPIO_PHYS + 0x60)
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#define AAEC_GPIO_DB __REG(AAEC_GPIO_PHYS + 0x64)
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#define AAEC_GPIO_PAPINDR __REG(AAEC_GPIO_PHYS + 0x68)
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#define AAEC_GPIO_PBPINDR __REG(AAEC_GPIO_PHYS + 0x6c)
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#define AAEC_GPIO_PCPINDR __REG(AAEC_GPIO_PHYS + 0x70)
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#define AAEC_GPIO_PDPINDR __REG(AAEC_GPIO_PHYS + 0x74)
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#define AAEC_GPIO_PEPINDR __REG(AAEC_GPIO_PHYS + 0x78)
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#define AAEC_GPIO_PFPINDR __REG(AAEC_GPIO_PHYS + 0x7c)
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#define AAEC_GPIO_PGPINDR __REG(AAEC_GPIO_PHYS + 0x80)
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#define AAEC_GPIO_PHPINDR __REG(AAEC_GPIO_PHYS + 0x84)
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#define AAEC_GPIO_PINMUX_PE0CON (1 << 0)
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#define AAEC_GPIO_PINMUX_PD0CON (1 << 1)
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#define AAEC_GPIO_PINMUX_CODECON (1 << 2)
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#define AAEC_GPIO_PINMUX_UART3CON (1 << 3)
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#endif /* __ARM_ARCH_AAEC2000_H */
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