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gpio: mpc8xxx: Add new platforms GPIO DT node description 

Update the NXP GPIO node dt-binding file for QorIQ and
Layerscape platforms, and add one more example with
ls2080a GPIO node.

Signed-off-by: Liu Gang <Gang.Liu@nxp.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This commit is contained in:
Liu Gang 2016-03-23 17:47:19 +08:00 committed by Linus Walleij
parent 80018bd9cb
commit 1418f9e6e0
1 changed files with 17 additions and 3 deletions
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20
Documentation/devicetree/bindings/gpio/gpio-mpc8xxx.txt
View File

@ -1,9 +1,10 @@
* Freescale MPC512x/MPC8xxx/Layerscape GPIO controller
* Freescale MPC512x/MPC8xxx/QorIQ/Layerscape GPIO controller
Required properties:
- compatible : Should be "fsl,<soc>-gpio"
The following <soc>s are known to be supported:
mpc5121, mpc5125, mpc8349, mpc8572, mpc8610, pq3, qoriq.
mpc5121, mpc5125, mpc8349, mpc8572, mpc8610, pq3, qoriq,
ls1021a, ls1043a, ls2080a.
- reg : Address and length of the register set for the device
- interrupts : Should be the port interrupt shared by all 32 pins.
- #gpio-cells : Should be two. The first cell is the pin number and
@ -15,7 +16,7 @@ Optional properties:
- little-endian : GPIO registers are used as little endian. If not
present registers are used as big endian by default.
Example:
Example of gpio-controller node for a mpc5125 SoC:
gpio0: gpio@1100 {
compatible = "fsl,mpc5125-gpio";
@ -24,3 +25,16 @@ gpio0: gpio@1100 {
interrupts = <78 0x8>;
status = "okay";
};
Example of gpio-controller node for a ls2080a SoC:
gpio0: gpio@2300000 {
compatible = "fsl,ls2080a-gpio", "fsl,qoriq-gpio";
reg = <0x0 0x2300000 0x0 0x10000>;
interrupts = <0 36 0x4>; /* Level high type */
gpio-controller;
little-endian;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};