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synced 2024-08-24 01:41:39 +00:00
cxgb4: Enable congestion notification from SGE for IQs and FLs.
Also changed the name of t4_hw.c:get_mps_bg_map() to t4_get_mps_bg_map() and make it an exported routine with a definition in cxgb4.h. Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
parent
1343299727
commit
145ef8a54e
5 changed files with 28 additions and 13 deletions
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@ -1055,7 +1055,7 @@ int t4_mgmt_tx(struct adapter *adap, struct sk_buff *skb);
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int t4_ofld_send(struct adapter *adap, struct sk_buff *skb);
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int t4_sge_alloc_rxq(struct adapter *adap, struct sge_rspq *iq, bool fwevtq,
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struct net_device *dev, int intr_idx,
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struct sge_fl *fl, rspq_handler_t hnd);
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struct sge_fl *fl, rspq_handler_t hnd, int cong);
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int t4_sge_alloc_eth_txq(struct adapter *adap, struct sge_eth_txq *txq,
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struct net_device *dev, struct netdev_queue *netdevq,
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unsigned int iqid);
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@ -1215,6 +1215,7 @@ int t4_mc_read(struct adapter *adap, int idx, u32 addr, __be32 *data,
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u64 *parity);
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int t4_edc_read(struct adapter *adap, int idx, u32 addr, __be32 *data,
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u64 *parity);
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unsigned int t4_get_mps_bg_map(struct adapter *adapter, int idx);
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void t4_pmtx_get_stats(struct adapter *adap, u32 cnt[], u64 cycles[]);
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void t4_pmrx_get_stats(struct adapter *adap, u32 cnt[], u64 cycles[]);
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int t4_read_cim_ibq(struct adapter *adap, unsigned int qid, u32 *data,
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@ -977,7 +977,7 @@ static int alloc_ofld_rxqs(struct adapter *adap, struct sge_ofld_rxq *q,
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err = t4_sge_alloc_rxq(adap, &q->rspq, false,
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adap->port[i / per_chan],
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msi_idx, q->fl.size ? &q->fl : NULL,
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uldrx_handler);
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uldrx_handler, 0);
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if (err)
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return err;
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memset(&q->stats, 0, sizeof(q->stats));
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@ -1007,7 +1007,7 @@ static int setup_sge_queues(struct adapter *adap)
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msi_idx = 1; /* vector 0 is for non-queue interrupts */
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else {
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err = t4_sge_alloc_rxq(adap, &s->intrq, false, adap->port[0], 0,
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NULL, NULL);
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NULL, NULL, -1);
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if (err)
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return err;
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msi_idx = -((int)s->intrq.abs_id + 1);
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@ -1027,7 +1027,7 @@ static int setup_sge_queues(struct adapter *adap)
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* new/deleted queues.
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*/
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err = t4_sge_alloc_rxq(adap, &s->fw_evtq, true, adap->port[0],
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msi_idx, NULL, fwevtq_handler);
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msi_idx, NULL, fwevtq_handler, -1);
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if (err) {
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freeout: t4_free_sge_resources(adap);
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return err;
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@ -1044,7 +1044,9 @@ freeout: t4_free_sge_resources(adap);
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msi_idx++;
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err = t4_sge_alloc_rxq(adap, &q->rspq, false, dev,
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msi_idx, &q->fl,
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t4_ethrx_handler);
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t4_ethrx_handler,
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t4_get_mps_bg_map(adap,
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pi->tx_chan));
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if (err)
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goto freeout;
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q->rspq.idx = j;
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@ -2437,9 +2437,12 @@ static void __iomem *bar2_address(struct adapter *adapter,
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return adapter->bar2 + bar2_qoffset;
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}
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/* @intr_idx: MSI/MSI-X vector if >=0, -(absolute qid + 1) if < 0
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* @cong: < 0 -> no congestion feedback, >= 0 -> congestion channel map
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*/
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int t4_sge_alloc_rxq(struct adapter *adap, struct sge_rspq *iq, bool fwevtq,
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struct net_device *dev, int intr_idx,
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struct sge_fl *fl, rspq_handler_t hnd)
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struct sge_fl *fl, rspq_handler_t hnd, int cong)
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{
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int ret, flsz = 0;
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struct fw_iq_cmd c;
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@ -2471,6 +2474,8 @@ int t4_sge_alloc_rxq(struct adapter *adap, struct sge_rspq *iq, bool fwevtq,
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FW_IQ_CMD_IQESIZE_V(ilog2(iq->iqe_len) - 4));
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c.iqsize = htons(iq->size);
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c.iqaddr = cpu_to_be64(iq->phys_addr);
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if (cong >= 0)
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c.iqns_to_fl0congen = htonl(FW_IQ_CMD_IQFLINTCONGEN_F);
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if (fl) {
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/* Allocate the ring for the hardware free list (with space
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@ -2490,10 +2495,15 @@ int t4_sge_alloc_rxq(struct adapter *adap, struct sge_rspq *iq, bool fwevtq,
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goto fl_nomem;
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flsz = fl->size / 8 + s->stat_len / sizeof(struct tx_desc);
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c.iqns_to_fl0congen = htonl(FW_IQ_CMD_FL0PACKEN_F |
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FW_IQ_CMD_FL0FETCHRO_F |
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FW_IQ_CMD_FL0DATARO_F |
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FW_IQ_CMD_FL0PADEN_F);
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c.iqns_to_fl0congen |= htonl(FW_IQ_CMD_FL0PACKEN_F |
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FW_IQ_CMD_FL0FETCHRO_F |
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FW_IQ_CMD_FL0DATARO_F |
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FW_IQ_CMD_FL0PADEN_F);
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if (cong >= 0)
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c.iqns_to_fl0congen |=
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htonl(FW_IQ_CMD_FL0CNGCHMAP_V(cong) |
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FW_IQ_CMD_FL0CONGCIF_F |
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FW_IQ_CMD_FL0CONGEN_F);
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c.fl0dcaen_to_fl0cidxfthresh = htons(FW_IQ_CMD_FL0FBMIN_V(2) |
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FW_IQ_CMD_FL0FBMAX_V(3));
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c.fl0size = htons(flsz);
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@ -3401,7 +3401,7 @@ void t4_pmrx_get_stats(struct adapter *adap, u32 cnt[], u64 cycles[])
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}
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/**
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* get_mps_bg_map - return the buffer groups associated with a port
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* t4_get_mps_bg_map - return the buffer groups associated with a port
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* @adap: the adapter
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* @idx: the port index
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*
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@ -3409,7 +3409,7 @@ void t4_pmrx_get_stats(struct adapter *adap, u32 cnt[], u64 cycles[])
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* with the given port. Bit i is set if buffer group i is used by the
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* port.
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*/
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static unsigned int get_mps_bg_map(struct adapter *adap, int idx)
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unsigned int t4_get_mps_bg_map(struct adapter *adap, int idx)
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{
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u32 n = NUMPORTS_G(t4_read_reg(adap, MPS_CMN_CTL_A));
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@ -3460,7 +3460,7 @@ const char *t4_get_port_type_description(enum fw_port_type port_type)
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*/
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void t4_get_port_stats(struct adapter *adap, int idx, struct port_stats *p)
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{
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u32 bgmap = get_mps_bg_map(adap, idx);
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u32 bgmap = t4_get_mps_bg_map(adap, idx);
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#define GET_STAT(name) \
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t4_read_reg64(adap, \
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@ -1377,6 +1377,7 @@ struct fw_iq_cmd {
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#define FW_IQ_CMD_IQFLINTCONGEN_S 27
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#define FW_IQ_CMD_IQFLINTCONGEN_V(x) ((x) << FW_IQ_CMD_IQFLINTCONGEN_S)
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#define FW_IQ_CMD_IQFLINTCONGEN_F FW_IQ_CMD_IQFLINTCONGEN_V(1U)
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#define FW_IQ_CMD_IQFLINTISCSIC_S 26
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#define FW_IQ_CMD_IQFLINTISCSIC_V(x) ((x) << FW_IQ_CMD_IQFLINTISCSIC_S)
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@ -1399,6 +1400,7 @@ struct fw_iq_cmd {
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#define FW_IQ_CMD_FL0CONGCIF_S 11
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#define FW_IQ_CMD_FL0CONGCIF_V(x) ((x) << FW_IQ_CMD_FL0CONGCIF_S)
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#define FW_IQ_CMD_FL0CONGCIF_F FW_IQ_CMD_FL0CONGCIF_V(1U)
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#define FW_IQ_CMD_FL0ONCHIP_S 10
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#define FW_IQ_CMD_FL0ONCHIP_V(x) ((x) << FW_IQ_CMD_FL0ONCHIP_S)
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