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driver: net: xgene: Add support for 2nd 10GbE port
Adding support for the second 10GbE port on APM X-Gene SoC Signed-off-by: Iyappan Subramanian <isubramanian@apm.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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7b6ee48d3f
commit
149e9ab495
3 changed files with 19 additions and 5 deletions
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@ -107,7 +107,8 @@ static void xgene_enet_set_ring_state(struct xgene_enet_desc_ring *ring)
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{
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{
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xgene_enet_ring_set_type(ring);
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xgene_enet_ring_set_type(ring);
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if (xgene_enet_ring_owner(ring->id) == RING_OWNER_ETH0)
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if (xgene_enet_ring_owner(ring->id) == RING_OWNER_ETH0 ||
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xgene_enet_ring_owner(ring->id) == RING_OWNER_ETH1)
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xgene_enet_ring_set_recombbuf(ring);
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xgene_enet_ring_set_recombbuf(ring);
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xgene_enet_ring_init(ring);
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xgene_enet_ring_init(ring);
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@ -1305,10 +1305,17 @@ static void xgene_enet_setup_ops(struct xgene_enet_pdata *pdata)
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pdata->ring_num = START_RING_NUM_0;
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pdata->ring_num = START_RING_NUM_0;
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break;
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break;
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case 1:
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case 1:
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if (pdata->phy_mode == PHY_INTERFACE_MODE_XGMII) {
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pdata->cpu_bufnum = XG_START_CPU_BUFNUM_1;
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pdata->eth_bufnum = XG_START_ETH_BUFNUM_1;
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pdata->bp_bufnum = XG_START_BP_BUFNUM_1;
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pdata->ring_num = XG_START_RING_NUM_1;
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} else {
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pdata->cpu_bufnum = START_CPU_BUFNUM_1;
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pdata->cpu_bufnum = START_CPU_BUFNUM_1;
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pdata->eth_bufnum = START_ETH_BUFNUM_1;
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pdata->eth_bufnum = START_ETH_BUFNUM_1;
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pdata->bp_bufnum = START_BP_BUFNUM_1;
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pdata->bp_bufnum = START_BP_BUFNUM_1;
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pdata->ring_num = START_RING_NUM_1;
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pdata->ring_num = START_RING_NUM_1;
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}
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break;
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break;
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default:
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default:
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break;
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break;
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@ -1478,6 +1485,7 @@ static const struct acpi_device_id xgene_enet_acpi_match[] = {
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{ "APMC0D05", XGENE_ENET1},
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{ "APMC0D05", XGENE_ENET1},
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{ "APMC0D30", XGENE_ENET1},
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{ "APMC0D30", XGENE_ENET1},
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{ "APMC0D31", XGENE_ENET1},
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{ "APMC0D31", XGENE_ENET1},
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{ "APMC0D3F", XGENE_ENET1},
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{ "APMC0D26", XGENE_ENET2},
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{ "APMC0D26", XGENE_ENET2},
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{ "APMC0D25", XGENE_ENET2},
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{ "APMC0D25", XGENE_ENET2},
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{ }
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{ }
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@ -56,6 +56,11 @@
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#define START_BP_BUFNUM_1 0x2A
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#define START_BP_BUFNUM_1 0x2A
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#define START_RING_NUM_1 264
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#define START_RING_NUM_1 264
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#define XG_START_CPU_BUFNUM_1 12
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#define XG_START_ETH_BUFNUM_1 2
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#define XG_START_BP_BUFNUM_1 0x22
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#define XG_START_RING_NUM_1 264
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#define X2_START_CPU_BUFNUM_0 0
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#define X2_START_CPU_BUFNUM_0 0
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#define X2_START_ETH_BUFNUM_0 0
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#define X2_START_ETH_BUFNUM_0 0
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#define X2_START_BP_BUFNUM_0 0x20
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#define X2_START_BP_BUFNUM_0 0x20
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