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KVM: PPC: Book3S_64 PR: Access shadow slb in big endian
The "shadow SLB" in the PACA is shared with the hypervisor, so it has to be big endian. We access the shadow SLB during world switch, so let's make sure we access it in big endian even when we're on a little endian host. Signed-off-by: Alexander Graf <agraf@suse.de>
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1 changed files with 16 additions and 17 deletions
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@ -17,29 +17,28 @@
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* Authors: Alexander Graf <agraf@suse.de>
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*/
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#ifdef __LITTLE_ENDIAN__
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#error Need to fix SLB shadow accesses in little endian mode
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#endif
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#define SHADOW_SLB_ESID(num) (SLBSHADOW_SAVEAREA + (num * 0x10))
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#define SHADOW_SLB_VSID(num) (SLBSHADOW_SAVEAREA + (num * 0x10) + 0x8)
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#define UNBOLT_SLB_ENTRY(num) \
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ld r9, SHADOW_SLB_ESID(num)(r12); \
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/* Invalid? Skip. */; \
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rldicl. r0, r9, 37, 63; \
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beq slb_entry_skip_ ## num; \
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xoris r9, r9, SLB_ESID_V@h; \
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std r9, SHADOW_SLB_ESID(num)(r12); \
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li r11, SHADOW_SLB_ESID(num); \
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LDX_BE r9, r12, r11; \
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/* Invalid? Skip. */; \
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rldicl. r0, r9, 37, 63; \
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beq slb_entry_skip_ ## num; \
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xoris r9, r9, SLB_ESID_V@h; \
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STDX_BE r9, r12, r11; \
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slb_entry_skip_ ## num:
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#define REBOLT_SLB_ENTRY(num) \
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ld r10, SHADOW_SLB_ESID(num)(r11); \
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cmpdi r10, 0; \
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beq slb_exit_skip_ ## num; \
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oris r10, r10, SLB_ESID_V@h; \
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ld r9, SHADOW_SLB_VSID(num)(r11); \
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slbmte r9, r10; \
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std r10, SHADOW_SLB_ESID(num)(r11); \
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li r8, SHADOW_SLB_ESID(num); \
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li r7, SHADOW_SLB_VSID(num); \
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LDX_BE r10, r11, r8; \
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cmpdi r10, 0; \
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beq slb_exit_skip_ ## num; \
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oris r10, r10, SLB_ESID_V@h; \
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LDX_BE r9, r11, r7; \
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slbmte r9, r10; \
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STDX_BE r10, r11, r8; \
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slb_exit_skip_ ## num:
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/******************************************************************************
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