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ARM: imx: set cache line size to 64 bytes for i.MX5
The core of i.MX5 series is cortex-A8, its cache line size is 64 bytes instead of 32 bytes. Refer to the OMAP3's selection, we choose 64 bytes for i.MX5, this can increase a little bit performance when perform cache operations. Signed-off-by: Jason Wang <jason77.wang@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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@ -43,6 +43,7 @@ config ARCH_MXC91231
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config ARCH_MX5
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bool "MX5-based"
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select CPU_V7
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select ARM_L1_CACHE_SHIFT_6
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help
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This enables support for systems based on the Freescale i.MX51 family
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