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ARM: dts: omap5-uevm: Provide USB Host PHY clock frequency
USB Host PHY clock on port 2 must be configured to 19.2MHz. Provide this information. Cc: Sricharan R <r.sricharan@ti.com> Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
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@ -42,6 +42,13 @@ hsusb2_reset: hsusb2_reset_reg {
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hsusb2_phy: hsusb2_phy {
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hsusb2_phy: hsusb2_phy {
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compatible = "usb-nop-xceiv";
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compatible = "usb-nop-xceiv";
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reset-supply = <&hsusb2_reset>;
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reset-supply = <&hsusb2_reset>;
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/**
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* FIXME
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* Put the right clock phandle here when available
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* clocks = <&auxclk1>;
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* clock-names = "main_clk";
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*/
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clock-frequency = <19200000>;
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};
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};
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/* HS USB Port 3 RESET */
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/* HS USB Port 3 RESET */
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