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arm64: dts: mediatek: asurada: Enable MMC
Enable both MMC controllers present on Asurada. MMC0 is for non-removable internal memory, while MMC1 is an SD card slot. MMC1 isn't used on all machines, but in those cases the CD interrupt is never triggered and thus it is basically as if it was disabled. Signed-off-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Tested-by: Chen-Yu Tsai <wenst@chromium.org> Link: https://lore.kernel.org/r/20220629155956.1138955-18-nfraprado@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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1 changed files with 149 additions and 0 deletions
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@ -170,6 +170,46 @@ &i2c7 {
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pinctrl-0 = <&i2c7_pins>;
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};
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&mmc0 {
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status = "okay";
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pinctrl-names = "default", "state_uhs";
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pinctrl-0 = <&mmc0_default_pins>;
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pinctrl-1 = <&mmc0_uhs_pins>;
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bus-width = <8>;
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max-frequency = <200000000>;
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vmmc-supply = <&mt6359_vemc_1_ldo_reg>;
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vqmmc-supply = <&mt6359_vufs_ldo_reg>;
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cap-mmc-highspeed;
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mmc-hs200-1_8v;
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mmc-hs400-1_8v;
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supports-cqe;
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cap-mmc-hw-reset;
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mmc-hs400-enhanced-strobe;
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hs400-ds-delay = <0x12814>;
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no-sdio;
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no-sd;
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non-removable;
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};
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&mmc1 {
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status = "okay";
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pinctrl-names = "default", "state_uhs";
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pinctrl-0 = <&mmc1_default_pins>;
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pinctrl-1 = <&mmc1_uhs_pins>;
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bus-width = <4>;
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max-frequency = <200000000>;
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cd-gpios = <&pio 17 GPIO_ACTIVE_LOW>;
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vmmc-supply = <&mt6360_ldo5_reg>;
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vqmmc-supply = <&mt6360_ldo3_reg>;
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cap-sd-highspeed;
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sd-uhs-sdr50;
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sd-uhs-sdr104;
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no-sdio;
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no-mmc;
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};
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/* for CORE */
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&mt6359_vgpu11_buck_reg {
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regulator-always-on;
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@ -503,6 +543,115 @@ pins-bus {
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};
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};
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mmc0_default_pins: mmc0-default-pins {
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pins-cmd-dat {
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pinmux = <PINMUX_GPIO184__FUNC_MSDC0_DAT0>,
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<PINMUX_GPIO188__FUNC_MSDC0_DAT1>,
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<PINMUX_GPIO185__FUNC_MSDC0_DAT2>,
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<PINMUX_GPIO193__FUNC_MSDC0_DAT3>,
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<PINMUX_GPIO186__FUNC_MSDC0_DAT4>,
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<PINMUX_GPIO189__FUNC_MSDC0_DAT5>,
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<PINMUX_GPIO187__FUNC_MSDC0_DAT6>,
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<PINMUX_GPIO190__FUNC_MSDC0_DAT7>,
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<PINMUX_GPIO183__FUNC_MSDC0_CMD>;
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input-enable;
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drive-strength = <8>;
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bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
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};
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pins-clk {
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pinmux = <PINMUX_GPIO192__FUNC_MSDC0_CLK>;
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drive-strength = <8>;
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bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
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};
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pins-rst {
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pinmux = <PINMUX_GPIO194__FUNC_MSDC0_RSTB>;
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drive-strength = <8>;
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bias-pull-down = <MTK_PUPD_SET_R1R0_01>;
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};
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};
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mmc0_uhs_pins: mmc0-uhs-pins {
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pins-cmd-dat {
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pinmux = <PINMUX_GPIO184__FUNC_MSDC0_DAT0>,
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<PINMUX_GPIO188__FUNC_MSDC0_DAT1>,
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<PINMUX_GPIO185__FUNC_MSDC0_DAT2>,
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<PINMUX_GPIO193__FUNC_MSDC0_DAT3>,
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<PINMUX_GPIO186__FUNC_MSDC0_DAT4>,
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<PINMUX_GPIO189__FUNC_MSDC0_DAT5>,
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<PINMUX_GPIO187__FUNC_MSDC0_DAT6>,
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<PINMUX_GPIO190__FUNC_MSDC0_DAT7>,
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<PINMUX_GPIO183__FUNC_MSDC0_CMD>;
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input-enable;
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drive-strength = <10>;
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bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
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};
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pins-clk {
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pinmux = <PINMUX_GPIO192__FUNC_MSDC0_CLK>;
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drive-strength = <10>;
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bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
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};
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pins-rst {
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pinmux = <PINMUX_GPIO194__FUNC_MSDC0_RSTB>;
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drive-strength = <8>;
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bias-pull-down = <MTK_PUPD_SET_R1R0_01>;
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};
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pins-ds {
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pinmux = <PINMUX_GPIO191__FUNC_MSDC0_DSL>;
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drive-strength = <10>;
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bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
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};
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};
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mmc1_default_pins: mmc1-default-pins {
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pins-cmd-dat {
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pinmux = <PINMUX_GPIO54__FUNC_MSDC1_DAT0>,
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<PINMUX_GPIO56__FUNC_MSDC1_DAT1>,
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<PINMUX_GPIO55__FUNC_MSDC1_DAT2>,
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<PINMUX_GPIO53__FUNC_MSDC1_DAT3>,
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<PINMUX_GPIO52__FUNC_MSDC1_CMD>;
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input-enable;
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drive-strength = <8>;
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bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
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};
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pins-clk {
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pinmux = <PINMUX_GPIO51__FUNC_MSDC1_CLK>;
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drive-strength = <8>;
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bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
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};
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pins-insert {
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pinmux = <PINMUX_GPIO17__FUNC_GPIO17>;
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input-enable;
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bias-pull-up;
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};
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};
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mmc1_uhs_pins: mmc1-uhs-pins {
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pins-cmd-dat {
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pinmux = <PINMUX_GPIO54__FUNC_MSDC1_DAT0>,
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<PINMUX_GPIO56__FUNC_MSDC1_DAT1>,
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<PINMUX_GPIO55__FUNC_MSDC1_DAT2>,
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<PINMUX_GPIO53__FUNC_MSDC1_DAT3>,
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<PINMUX_GPIO52__FUNC_MSDC1_CMD>;
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input-enable;
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drive-strength = <8>;
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bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
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};
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pins-clk {
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pinmux = <PINMUX_GPIO51__FUNC_MSDC1_CLK>;
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input-enable;
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drive-strength = <8>;
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bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
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};
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};
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pcie_pins: pcie-default-pins {
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pins-pcie-wake {
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pinmux = <PINMUX_GPIO63__FUNC_PCIE_WAKE_N>;
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