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clk: at91: generated: Truncate divisor to GENERATED_MAX_DIV + 1
In clk_generated_determine_rate(), if the divisor is greater than
GENERATED_MAX_DIV + 1, then the wrong best_rate will be returned.
If clk_generated_set_rate() will be called later with this wrong
rate, it will return -EINVAL, so the generated clock won't change
its value. Do no let the divisor be greater than GENERATED_MAX_DIV + 1.
Fixes: 8c7aa63289
("clk: at91: clk-generated: remove useless divisor loop")
Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Acked-by: Ludovic Desroches <ludovic.desroches@microchip.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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@ -141,6 +141,8 @@ static int clk_generated_determine_rate(struct clk_hw *hw,
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continue;
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continue;
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div = DIV_ROUND_CLOSEST(parent_rate, req->rate);
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div = DIV_ROUND_CLOSEST(parent_rate, req->rate);
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if (div > GENERATED_MAX_DIV + 1)
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div = GENERATED_MAX_DIV + 1;
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clk_generated_best_diff(req, parent, parent_rate, div,
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clk_generated_best_diff(req, parent, parent_rate, div,
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&best_diff, &best_rate);
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&best_diff, &best_rate);
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