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MIPS: Add identifiers for Octeon II CPUs.
Signed-off-by: David Daney <ddaney@caviumnetworks.com> Patchwork: http://patchwork.linux-mips.org/patch/1662/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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@ -131,6 +131,7 @@
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#define PRID_IMP_CAVIUM_CN56XX 0x0400
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#define PRID_IMP_CAVIUM_CN50XX 0x0600
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#define PRID_IMP_CAVIUM_CN52XX 0x0700
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#define PRID_IMP_CAVIUM_CN63XX 0x9000
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/*
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* These are the PRID's for when 23:16 == PRID_COMP_INGENIC
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@ -231,7 +232,7 @@ enum cpu_type_enum {
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* MIPS64 class processors
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*/
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CPU_5KC, CPU_20KC, CPU_25KF, CPU_SB1, CPU_SB1A, CPU_LOONGSON2,
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CPU_CAVIUM_OCTEON, CPU_CAVIUM_OCTEON_PLUS,
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CPU_CAVIUM_OCTEON, CPU_CAVIUM_OCTEON_PLUS, CPU_CAVIUM_OCTEON2,
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CPU_LAST
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};
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