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net: dsa: Converting remaining registers to mnemonics
Use defines for registers, shifts and bits in the remaining register accesses in the individual drivers, in order to aid readability. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
parent
dbde9e6667
commit
15966a2a76
5 changed files with 69 additions and 16 deletions
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@ -54,7 +54,9 @@ static char *mv88e6123_61_65_probe(struct device *host_dev, int sw_addr)
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static int mv88e6123_61_65_setup_global(struct dsa_switch *ds)
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{
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u32 upstream_port = dsa_upstream_port(ds);
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int ret;
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u32 reg;
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ret = mv88e6xxx_setup_global(ds);
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if (ret)
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@ -64,18 +66,21 @@ static int mv88e6123_61_65_setup_global(struct dsa_switch *ds)
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* external PHYs to poll), don't discard packets with
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* excessive collisions, and mask all interrupt sources.
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*/
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REG_WRITE(REG_GLOBAL, 0x04, 0x0000);
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REG_WRITE(REG_GLOBAL, GLOBAL_CONTROL, 0x0000);
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/* Configure the upstream port, and configure the upstream
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* port as the port to which ingress and egress monitor frames
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* are to be sent.
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*/
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REG_WRITE(REG_GLOBAL, 0x1a, (dsa_upstream_port(ds) * 0x1110));
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reg = upstream_port << GLOBAL_MONITOR_CONTROL_INGRESS_SHIFT |
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upstream_port << GLOBAL_MONITOR_CONTROL_EGRESS_SHIFT |
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upstream_port << GLOBAL_MONITOR_CONTROL_ARP_SHIFT;
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REG_WRITE(REG_GLOBAL, GLOBAL_MONITOR_CONTROL, reg);
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/* Disable remote management for now, and set the switch's
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* DSA device number.
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*/
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REG_WRITE(REG_GLOBAL, 0x1c, ds->index & 0x1f);
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REG_WRITE(REG_GLOBAL, GLOBAL_CONTROL_2, ds->index & 0x1f);
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return 0;
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}
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@ -44,7 +44,9 @@ static char *mv88e6131_probe(struct device *host_dev, int sw_addr)
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static int mv88e6131_setup_global(struct dsa_switch *ds)
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{
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u32 upstream_port = dsa_upstream_port(ds);
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int ret;
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u32 reg;
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ret = mv88e6xxx_setup_global(ds);
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if (ret)
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@ -55,30 +57,42 @@ static int mv88e6131_setup_global(struct dsa_switch *ds)
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* to arbitrate between packet queues, set the maximum frame
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* size to 1632, and mask all interrupt sources.
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*/
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REG_WRITE(REG_GLOBAL, 0x04, 0x4400);
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REG_WRITE(REG_GLOBAL, GLOBAL_CONTROL,
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GLOBAL_CONTROL_PPU_ENABLE | GLOBAL_CONTROL_MAX_FRAME_1632);
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/* Set the VLAN ethertype to 0x8100. */
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REG_WRITE(REG_GLOBAL, 0x19, 0x8100);
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REG_WRITE(REG_GLOBAL, GLOBAL_CORE_TAG_TYPE, 0x8100);
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/* Disable ARP mirroring, and configure the upstream port as
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* the port to which ingress and egress monitor frames are to
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* be sent.
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*/
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REG_WRITE(REG_GLOBAL, 0x1a, (dsa_upstream_port(ds) * 0x1100) | 0x00f0);
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reg = upstream_port << GLOBAL_MONITOR_CONTROL_INGRESS_SHIFT |
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upstream_port << GLOBAL_MONITOR_CONTROL_EGRESS_SHIFT |
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GLOBAL_MONITOR_CONTROL_ARP_DISABLED;
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REG_WRITE(REG_GLOBAL, GLOBAL_MONITOR_CONTROL, reg);
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/* Disable cascade port functionality unless this device
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* is used in a cascade configuration, and set the switch's
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* DSA device number.
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*/
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if (ds->dst->pd->nr_chips > 1)
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REG_WRITE(REG_GLOBAL, 0x1c, 0xf000 | (ds->index & 0x1f));
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REG_WRITE(REG_GLOBAL, GLOBAL_CONTROL_2,
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GLOBAL_CONTROL_2_MULTIPLE_CASCADE |
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(ds->index & 0x1f));
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else
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REG_WRITE(REG_GLOBAL, 0x1c, 0xe000 | (ds->index & 0x1f));
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REG_WRITE(REG_GLOBAL, GLOBAL_CONTROL_2,
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GLOBAL_CONTROL_2_NO_CASCADE |
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(ds->index & 0x1f));
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/* Force the priority of IGMP/MLD snoop frames and ARP frames
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* to the highest setting.
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*/
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REG_WRITE(REG_GLOBAL2, 0x0f, 0x00ff);
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REG_WRITE(REG_GLOBAL2, GLOBAL2_PRIO_OVERRIDE,
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GLOBAL2_PRIO_OVERRIDE_FORCE_SNOOP |
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7 << GLOBAL2_PRIO_OVERRIDE_SNOOP_SHIFT |
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GLOBAL2_PRIO_OVERRIDE_FORCE_ARP |
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7 << GLOBAL2_PRIO_OVERRIDE_ARP_SHIFT);
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return 0;
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}
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@ -38,6 +38,7 @@ static char *mv88e6171_probe(struct device *host_dev, int sw_addr)
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static int mv88e6171_setup_global(struct dsa_switch *ds)
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{
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u32 upstream_port = dsa_upstream_port(ds);
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int ret;
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ret = mv88e6xxx_setup_global(ds);
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@ -47,21 +48,36 @@ static int mv88e6171_setup_global(struct dsa_switch *ds)
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/* Discard packets with excessive collisions, mask all
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* interrupt sources, enable PPU.
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*/
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REG_WRITE(REG_GLOBAL, 0x04, 0x6000);
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REG_WRITE(REG_GLOBAL, GLOBAL_CONTROL,
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GLOBAL_CONTROL_PPU_ENABLE | GLOBAL_CONTROL_DISCARD_EXCESS);
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/* Configure the upstream port, and configure the upstream
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* port as the port to which ingress and egress monitor frames
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* are to be sent.
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*/
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if (REG_READ(REG_PORT(0), 0x03) == 0x1710)
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REG_WRITE(REG_GLOBAL, 0x1a, (dsa_upstream_port(ds) * 0x1111));
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if (REG_READ(REG_PORT(0), PORT_SWITCH_ID) == PORT_SWITCH_ID_6171)
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REG_WRITE(REG_GLOBAL, GLOBAL_MONITOR_CONTROL,
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upstream_port <<
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GLOBAL_MONITOR_CONTROL_INGRESS_SHIFT |
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upstream_port <<
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GLOBAL_MONITOR_CONTROL_EGRESS_SHIFT |
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upstream_port <<
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GLOBAL_MONITOR_CONTROL_ARP_SHIFT |
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upstream_port <<
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GLOBAL_MONITOR_CONTROL_MIRROR_SHIFT);
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else
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REG_WRITE(REG_GLOBAL, 0x1a, (dsa_upstream_port(ds) * 0x1110));
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REG_WRITE(REG_GLOBAL, GLOBAL_MONITOR_CONTROL,
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upstream_port <<
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GLOBAL_MONITOR_CONTROL_INGRESS_SHIFT |
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upstream_port <<
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GLOBAL_MONITOR_CONTROL_EGRESS_SHIFT |
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upstream_port <<
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GLOBAL_MONITOR_CONTROL_ARP_SHIFT);
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/* Disable remote management for now, and set the switch's
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* DSA device number.
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*/
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REG_WRITE(REG_GLOBAL, 0x1c, ds->index & 0x1f);
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REG_WRITE(REG_GLOBAL, GLOBAL_CONTROL_2, ds->index & 0x1f);
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return 0;
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}
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@ -47,7 +47,9 @@ static char *mv88e6352_probe(struct device *host_dev, int sw_addr)
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static int mv88e6352_setup_global(struct dsa_switch *ds)
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{
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u32 upstream_port = dsa_upstream_port(ds);
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int ret;
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u32 reg;
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ret = mv88e6xxx_setup_global(ds);
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if (ret)
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@ -56,13 +58,17 @@ static int mv88e6352_setup_global(struct dsa_switch *ds)
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/* Discard packets with excessive collisions,
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* mask all interrupt sources, enable PPU (bit 14, undocumented).
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*/
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REG_WRITE(REG_GLOBAL, 0x04, 0x6000);
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REG_WRITE(REG_GLOBAL, GLOBAL_CONTROL,
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GLOBAL_CONTROL_PPU_ENABLE | GLOBAL_CONTROL_DISCARD_EXCESS);
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/* Configure the upstream port, and configure the upstream
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* port as the port to which ingress and egress monitor frames
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* are to be sent.
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*/
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REG_WRITE(REG_GLOBAL, 0x1a, (dsa_upstream_port(ds) * 0x1110));
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reg = upstream_port << GLOBAL_MONITOR_CONTROL_INGRESS_SHIFT |
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upstream_port << GLOBAL_MONITOR_CONTROL_EGRESS_SHIFT |
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upstream_port << GLOBAL_MONITOR_CONTROL_ARP_SHIFT;
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REG_WRITE(REG_GLOBAL, GLOBAL_MONITOR_CONTROL, reg);
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/* Disable remote management for now, and set the switch's
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* DSA device number.
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@ -216,7 +216,15 @@
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#define GLOBAL_IEEE_PRI 0x18
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#define GLOBAL_CORE_TAG_TYPE 0x19
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#define GLOBAL_MONITOR_CONTROL 0x1a
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#define GLOBAL_MONITOR_CONTROL_INGRESS_SHIFT 12
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#define GLOBAL_MONITOR_CONTROL_EGRESS_SHIFT 8
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#define GLOBAL_MONITOR_CONTROL_ARP_SHIFT 4
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#define GLOBAL_MONITOR_CONTROL_MIRROR_SHIFT 0
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#define GLOBAL_MONITOR_CONTROL_ARP_DISABLED (0xf0)
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#define GLOBAL_CONTROL_2 0x1c
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#define GLOBAL_CONTROL_2_NO_CASCADE 0xe000
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#define GLOBAL_CONTROL_2_MULTIPLE_CASCADE 0xf000
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#define GLOBAL_STATS_OP 0x1d
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#define GLOBAL_STATS_OP_BUSY BIT(15)
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#define GLOBAL_STATS_OP_NOP (0 << 12)
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@ -259,6 +267,10 @@
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#define GLOBAL2_SWITCH_MAC_BUSY BIT(15)
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#define GLOBAL2_ATU_STATS 0x0e
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#define GLOBAL2_PRIO_OVERRIDE 0x0f
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#define GLOBAL2_PRIO_OVERRIDE_FORCE_SNOOP BIT(7)
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#define GLOBAL2_PRIO_OVERRIDE_SNOOP_SHIFT 4
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#define GLOBAL2_PRIO_OVERRIDE_FORCE_ARP BIT(3)
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#define GLOBAL2_PRIO_OVERRIDE_ARP_SHIFT 0
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#define GLOBAL2_EEPROM_OP 0x14
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#define GLOBAL2_EEPROM_OP_BUSY BIT(15)
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#define GLOBAL2_EEPROM_OP_LOAD BIT(11)
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