mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-09-13 14:14:37 +00:00
Renesas ARM Based SoC Updates for v3.16
SH Mobile shared SoC code * Add shared shmobile_init_delay() r8a7791 (R-Car M2) and r8a7790 (R-Car H2) SoCs (R-Car Gen2 shared code) * Cache Mode Monitor Register Value r8a7791 (R-Car M2) SoC Check r8a7791 MD21 at SMP boot r8a7790 (R-Car H2) SoC * Make use of r8a7790_add_standard_devices() * Update r8a7791 CPU freq to 1500MHz r8a7778 (R-Car M1) SoC * Move "select RENESAS_INTC_IRQPIN" under SoC emev2 (Emma Mobale EV2) SoC * Remove legacy EMEV2 SoC support -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.14 (GNU/Linux) iQIcBAABAgAGBQJTThrdAAoJENfPZGlqN0++KpAP/0gzOYsPHFuyyKS/LGya9u6s S3vhnxtm+WxF4Kecqndngqn2r62fXrPe6NWidG3ArXIv/wcd+GgrFpT6cEwzWy8g HmmHqNjXKE0ecXMMyUI8QR60t3OWW/Z03GcubPi7KvrxbAP9Fl/B3y36BIOTJVF/ JP0Ve2NzjpKYa4l5izhTyCOlYKmvGqxP2VI0ZKCexdyDAQ592/vE+z7PisKy0B3c nDKz5TLqTeKU3+9y4us8ueoTbmIGCzXvIBatGh4vFf/uU2nun6QWPqmTfbUclx8n 3ynBt2WzW33dnvtafqZsfDEVKShv1R11MuwBhzOHYe27obb4Hi4+hWF71HVqceNH Z1VFvkIQtqp2K3X6DKaKmpLXi6FnHfvDx8lBBmxmlJViF8fRH+ZP0z6YOpLgb5Y/ RE0SiKTNtZSiq1guHChOp6Qv4cY77Y/NkRUyXiNulPYHAx0SuG24Eqqvw9XbwIt/ jpxxMddwYcoFBviBzDnDQ3407qrWcluKv+xKFBslS9yLTX1hcNrsk5wj1CyLz74K HLTLEoU9BOSXTpiTmDBF4O00hShiQl98XH5l7eLyzocC6uUt0/yiBkW9+pZDp58F s5KyPYEsSF2yMcYtjOwkyPeYNS4unzpfvDkFuwo+oCvJzKvc8LQjOkes2Q6Qp1fK P7iaiU1yHceKLkC12dMG =JBYi -----END PGP SIGNATURE----- Merge tag 'renesas-soc-for-v3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc Merge "Renesas ARM Based SoC Updates for v3.16" from Simon Horman: SH Mobile shared SoC code * Add shared shmobile_init_delay() r8a7791 (R-Car M2) and r8a7790 (R-Car H2) SoCs (R-Car Gen2 shared code) * Cache Mode Monitor Register Value r8a7791 (R-Car M2) SoC Check r8a7791 MD21 at SMP boot r8a7790 (R-Car H2) SoC * Make use of r8a7790_add_standard_devices() * Update r8a7791 CPU freq to 1500MHz r8a7778 (R-Car M1) SoC * Move "select RENESAS_INTC_IRQPIN" under SoC emev2 (Emma Mobale EV2) SoC * Remove legacy EMEV2 SoC support * tag 'renesas-soc-for-v3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: ARM: shmobile: r8a7778/bockw: Move "select RENESAS_INTC_IRQPIN" under SoC ARM: shmobile: Check r8a7791 MD21 at SMP boot ARM: shmobile: rcar-gen2: Cache Mode Monitor Register Value ARM: shmobile: Make use of r8a7790_add_standard_devices() ARM: shmobile: Remove EMEV2 header file ARM: shmobile: Remove legacy EMEV2 SoC support ARM: shmobile: Add shared shmobile_init_delay() ARM: shmobile: Update r8a7791 CPU freq to 1500MHz in C Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson
commit
15e824dd22
13 changed files with 65 additions and 276 deletions
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@ -297,8 +297,7 @@ dtb-$(CONFIG_ARCH_QCOM) += qcom-msm8660-surf.dtb \
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dtb-$(CONFIG_ARCH_S3C24XX) += s3c2416-smdk2416.dtb
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dtb-$(CONFIG_ARCH_S3C64XX) += s3c6410-mini6410.dtb \
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s3c6410-smdk6410.dtb
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dtb-$(CONFIG_ARCH_SHMOBILE_LEGACY) += emev2-kzm9d.dtb \
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r7s72100-genmai.dtb \
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dtb-$(CONFIG_ARCH_SHMOBILE_LEGACY) += r7s72100-genmai.dtb \
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r7s72100-genmai-reference.dtb \
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r8a7740-armadillo800eva.dtb \
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r8a7778-bockw.dtb \
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@ -108,6 +108,7 @@ config ARCH_R8A7778
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select SH_CLK_CPG
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select ARM_GIC
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select SYS_SUPPORTS_SH_TMU
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select RENESAS_INTC_IRQPIN
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config ARCH_R8A7779
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bool "R-Car H1 (R8A77790)"
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@ -140,16 +141,6 @@ config ARCH_R8A7791
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select SYS_SUPPORTS_SH_CMT
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select ARCH_DMA_ADDR_T_64BIT if ARM_LPAE
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config ARCH_EMEV2
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bool "Emma Mobile EV2"
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select ARCH_WANT_OPTIONAL_GPIOLIB
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select ARM_GIC
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select CPU_V7
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select MIGHT_HAVE_PCI
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select USE_OF
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select AUTO_ZRELADDR
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select SYS_SUPPORTS_EM_STI
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config ARCH_R7S72100
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bool "RZ/A1H (R7S72100)"
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select ARCH_WANT_OPTIONAL_GPIOLIB
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@ -216,7 +207,6 @@ config MACH_BOCKW
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depends on ARCH_R8A7778
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select ARCH_REQUIRE_GPIOLIB
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select REGULATOR_FIXED_VOLTAGE if REGULATOR
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select RENESAS_INTC_IRQPIN
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select SND_SOC_AK4554 if SND_SIMPLE_CARD
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select SND_SOC_AK4642 if SND_SIMPLE_CARD
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select USE_OF
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@ -225,7 +215,6 @@ config MACH_BOCKW_REFERENCE
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bool "BOCK-W - Reference Device Tree Implementation"
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depends on ARCH_R8A7778
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select ARCH_REQUIRE_GPIOLIB
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select RENESAS_INTC_IRQPIN
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select REGULATOR_FIXED_VOLTAGE if REGULATOR
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select USE_OF
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---help---
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@ -31,7 +31,6 @@ obj-$(CONFIG_ARCH_R8A7778) += clock-r8a7778.o
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obj-$(CONFIG_ARCH_R8A7779) += clock-r8a7779.o
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obj-$(CONFIG_ARCH_R8A7790) += clock-r8a7790.o
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obj-$(CONFIG_ARCH_R8A7791) += clock-r8a7791.o
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obj-$(CONFIG_ARCH_EMEV2) += clock-emev2.o
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obj-$(CONFIG_ARCH_R7S72100) += clock-r7s72100.o
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endif
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@ -1,231 +0,0 @@
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/*
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* Emma Mobile EV2 clock framework support
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*
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* Copyright (C) 2012 Magnus Damm
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/io.h>
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#include <linux/sh_clk.h>
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#include <linux/clkdev.h>
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#include <mach/common.h>
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#define EMEV2_SMU_BASE 0xe0110000
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/* EMEV2 SMU registers */
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#define USIAU0_RSTCTRL 0x094
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#define USIBU1_RSTCTRL 0x0ac
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#define USIBU2_RSTCTRL 0x0b0
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#define USIBU3_RSTCTRL 0x0b4
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#define STI_RSTCTRL 0x124
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#define USIAU0GCLKCTRL 0x4a0
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#define USIBU1GCLKCTRL 0x4b8
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#define USIBU2GCLKCTRL 0x4bc
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#define USIBU3GCLKCTRL 0x04c0
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#define STIGCLKCTRL 0x528
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#define USIAU0SCLKDIV 0x61c
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#define USIB2SCLKDIV 0x65c
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#define USIB3SCLKDIV 0x660
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#define STI_CLKSEL 0x688
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/* not pretty, but hey */
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static void __iomem *smu_base;
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static void emev2_smu_write(unsigned long value, int offs)
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{
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BUG_ON(!smu_base || (offs >= PAGE_SIZE));
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iowrite32(value, smu_base + offs);
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}
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static struct clk_mapping smu_mapping = {
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.phys = EMEV2_SMU_BASE,
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.len = PAGE_SIZE,
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};
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/* Fixed 32 KHz root clock from C32K pin */
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static struct clk c32k_clk = {
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.rate = 32768,
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.mapping = &smu_mapping,
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};
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/* PLL3 multiplies C32K with 7000 */
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static unsigned long pll3_recalc(struct clk *clk)
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{
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return clk->parent->rate * 7000;
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}
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static struct sh_clk_ops pll3_clk_ops = {
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.recalc = pll3_recalc,
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};
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static struct clk pll3_clk = {
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.ops = &pll3_clk_ops,
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.parent = &c32k_clk,
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};
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static struct clk *main_clks[] = {
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&c32k_clk,
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&pll3_clk,
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};
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enum { SCLKDIV_USIAU0, SCLKDIV_USIBU2, SCLKDIV_USIBU1, SCLKDIV_USIBU3,
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SCLKDIV_NR };
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#define SCLKDIV(_reg, _shift) \
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{ \
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.parent = &pll3_clk, \
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.enable_reg = IOMEM(EMEV2_SMU_BASE + (_reg)), \
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.enable_bit = _shift, \
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}
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static struct clk sclkdiv_clks[SCLKDIV_NR] = {
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[SCLKDIV_USIAU0] = SCLKDIV(USIAU0SCLKDIV, 0),
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[SCLKDIV_USIBU2] = SCLKDIV(USIB2SCLKDIV, 16),
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[SCLKDIV_USIBU1] = SCLKDIV(USIB2SCLKDIV, 0),
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[SCLKDIV_USIBU3] = SCLKDIV(USIB3SCLKDIV, 0),
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};
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enum { GCLK_USIAU0_SCLK, GCLK_USIBU1_SCLK, GCLK_USIBU2_SCLK, GCLK_USIBU3_SCLK,
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GCLK_STI_SCLK,
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GCLK_NR };
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#define GCLK_SCLK(_parent, _reg) \
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{ \
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.parent = _parent, \
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.enable_reg = IOMEM(EMEV2_SMU_BASE + (_reg)), \
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.enable_bit = 1, /* SCLK_GCC */ \
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}
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static struct clk gclk_clks[GCLK_NR] = {
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[GCLK_USIAU0_SCLK] = GCLK_SCLK(&sclkdiv_clks[SCLKDIV_USIAU0],
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USIAU0GCLKCTRL),
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[GCLK_USIBU1_SCLK] = GCLK_SCLK(&sclkdiv_clks[SCLKDIV_USIBU1],
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USIBU1GCLKCTRL),
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[GCLK_USIBU2_SCLK] = GCLK_SCLK(&sclkdiv_clks[SCLKDIV_USIBU2],
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USIBU2GCLKCTRL),
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[GCLK_USIBU3_SCLK] = GCLK_SCLK(&sclkdiv_clks[SCLKDIV_USIBU3],
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USIBU3GCLKCTRL),
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[GCLK_STI_SCLK] = GCLK_SCLK(&c32k_clk, STIGCLKCTRL),
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};
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static int emev2_gclk_enable(struct clk *clk)
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{
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iowrite32(ioread32(clk->mapped_reg) | (1 << clk->enable_bit),
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clk->mapped_reg);
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return 0;
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}
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static void emev2_gclk_disable(struct clk *clk)
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{
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iowrite32(ioread32(clk->mapped_reg) & ~(1 << clk->enable_bit),
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clk->mapped_reg);
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}
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static struct sh_clk_ops emev2_gclk_clk_ops = {
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.enable = emev2_gclk_enable,
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.disable = emev2_gclk_disable,
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.recalc = followparent_recalc,
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};
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static int __init emev2_gclk_register(struct clk *clks, int nr)
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{
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struct clk *clkp;
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int ret = 0;
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int k;
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for (k = 0; !ret && (k < nr); k++) {
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clkp = clks + k;
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clkp->ops = &emev2_gclk_clk_ops;
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ret |= clk_register(clkp);
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}
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return ret;
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}
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static unsigned long emev2_sclkdiv_recalc(struct clk *clk)
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{
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unsigned int sclk_div;
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sclk_div = (ioread32(clk->mapped_reg) >> clk->enable_bit) & 0xff;
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return clk->parent->rate / (sclk_div + 1);
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}
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static struct sh_clk_ops emev2_sclkdiv_clk_ops = {
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.recalc = emev2_sclkdiv_recalc,
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};
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static int __init emev2_sclkdiv_register(struct clk *clks, int nr)
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{
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struct clk *clkp;
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int ret = 0;
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int k;
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for (k = 0; !ret && (k < nr); k++) {
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clkp = clks + k;
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clkp->ops = &emev2_sclkdiv_clk_ops;
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ret |= clk_register(clkp);
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}
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return ret;
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}
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static struct clk_lookup lookups[] = {
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CLKDEV_DEV_ID("serial8250-em.0", &gclk_clks[GCLK_USIAU0_SCLK]),
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CLKDEV_DEV_ID("e1020000.uart", &gclk_clks[GCLK_USIAU0_SCLK]),
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CLKDEV_DEV_ID("serial8250-em.1", &gclk_clks[GCLK_USIBU1_SCLK]),
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CLKDEV_DEV_ID("e1030000.uart", &gclk_clks[GCLK_USIBU1_SCLK]),
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CLKDEV_DEV_ID("serial8250-em.2", &gclk_clks[GCLK_USIBU2_SCLK]),
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CLKDEV_DEV_ID("e1040000.uart", &gclk_clks[GCLK_USIBU2_SCLK]),
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CLKDEV_DEV_ID("serial8250-em.3", &gclk_clks[GCLK_USIBU3_SCLK]),
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CLKDEV_DEV_ID("e1050000.uart", &gclk_clks[GCLK_USIBU3_SCLK]),
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CLKDEV_DEV_ID("em_sti.0", &gclk_clks[GCLK_STI_SCLK]),
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CLKDEV_DEV_ID("e0180000.sti", &gclk_clks[GCLK_STI_SCLK]),
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};
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void __init emev2_clock_init(void)
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{
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int k, ret = 0;
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smu_base = ioremap(EMEV2_SMU_BASE, PAGE_SIZE);
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BUG_ON(!smu_base);
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/* setup STI timer to run on 32.768 kHz and deassert reset */
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emev2_smu_write(0, STI_CLKSEL);
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emev2_smu_write(1, STI_RSTCTRL);
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/* deassert reset for UART0->UART3 */
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emev2_smu_write(2, USIAU0_RSTCTRL);
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emev2_smu_write(2, USIBU1_RSTCTRL);
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emev2_smu_write(2, USIBU2_RSTCTRL);
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emev2_smu_write(2, USIBU3_RSTCTRL);
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for (k = 0; !ret && (k < ARRAY_SIZE(main_clks)); k++)
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ret = clk_register(main_clks[k]);
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if (!ret)
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ret = emev2_sclkdiv_register(sclkdiv_clks, SCLKDIV_NR);
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if (!ret)
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ret = emev2_gclk_register(gclk_clks, GCLK_NR);
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clkdev_add_table(lookups, ARRAY_SIZE(lookups));
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if (!ret)
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shmobile_clk_init();
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else
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panic("failed to setup emev2 clocks\n");
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}
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@ -4,6 +4,7 @@
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extern void shmobile_earlytimer_init(void);
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extern void shmobile_setup_delay(unsigned int max_cpu_core_mhz,
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unsigned int mult, unsigned int div);
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extern void shmobile_init_delay(void);
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struct twd_local_timer;
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extern void shmobile_setup_console(void);
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extern void shmobile_boot_vector(void);
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@ -1,9 +0,0 @@
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#ifndef __ASM_EMEV2_H__
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#define __ASM_EMEV2_H__
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extern void emev2_map_io(void);
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extern void emev2_init_delay(void);
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extern void emev2_clock_init(void);
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extern struct smp_operations emev2_smp_ops;
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#endif /* __ASM_EMEV2_H__ */
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@ -21,7 +21,6 @@
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#include <linux/init.h>
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#include <linux/of_platform.h>
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#include <mach/common.h>
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#include <mach/emev2.h>
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#include <asm/mach-types.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/map.h>
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@ -38,23 +37,19 @@ static struct map_desc emev2_io_desc[] __initdata = {
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#endif
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};
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void __init emev2_map_io(void)
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static void __init emev2_map_io(void)
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{
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iotable_init(emev2_io_desc, ARRAY_SIZE(emev2_io_desc));
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}
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void __init emev2_init_delay(void)
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static void __init emev2_init_delay(void)
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{
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shmobile_setup_delay(533, 1, 3); /* Cortex-A9 @ 533MHz */
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}
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static void __init emev2_add_standard_devices_dt(void)
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{
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#ifdef CONFIG_COMMON_CLK
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of_clk_init(NULL);
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#else
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emev2_clock_init();
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#endif
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of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
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}
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@ -63,6 +58,8 @@ static const char *emev2_boards_compat_dt[] __initconst = {
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NULL,
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};
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extern struct smp_operations emev2_smp_ops;
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|
||||
DT_MACHINE_START(EMEV2_DT, "Generic Emma Mobile EV2 (Flattened Device Tree)")
|
||||
.smp = smp_ops(emev2_smp_ops),
|
||||
.map_io = emev2_map_io,
|
||||
|
|
|
|||
|
|
@ -185,12 +185,6 @@ void __init r8a7790_pinmux_init(void)
|
|||
r8a7790_register_gpio(3);
|
||||
r8a7790_register_gpio(4);
|
||||
r8a7790_register_gpio(5);
|
||||
r8a7790_register_i2c(0);
|
||||
r8a7790_register_i2c(1);
|
||||
r8a7790_register_i2c(2);
|
||||
r8a7790_register_i2c(3);
|
||||
r8a7790_register_audio_dmac(0);
|
||||
r8a7790_register_audio_dmac(1);
|
||||
}
|
||||
|
||||
#define __R8A7790_SCIF(scif_type, _scscr, index, baseaddr, irq) \
|
||||
|
|
@ -308,6 +302,12 @@ void __init r8a7790_add_standard_devices(void)
|
|||
r8a7790_add_dt_devices();
|
||||
r8a7790_register_irqc(0);
|
||||
r8a7790_register_thermal();
|
||||
r8a7790_register_i2c(0);
|
||||
r8a7790_register_i2c(1);
|
||||
r8a7790_register_i2c(2);
|
||||
r8a7790_register_i2c(3);
|
||||
r8a7790_register_audio_dmac(0);
|
||||
r8a7790_register_audio_dmac(1);
|
||||
}
|
||||
|
||||
void __init r8a7790_init_early(void)
|
||||
|
|
|
|||
|
|
@ -213,7 +213,7 @@ void __init r8a7791_add_standard_devices(void)
|
|||
void __init r8a7791_init_early(void)
|
||||
{
|
||||
#ifndef CONFIG_ARM_ARCH_TIMER
|
||||
shmobile_setup_delay(1300, 2, 4); /* Cortex-A15 @ 1300MHz */
|
||||
shmobile_setup_delay(1500, 2, 4); /* Cortex-A15 @ 1500MHz */
|
||||
#endif
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -30,12 +30,16 @@
|
|||
|
||||
u32 rcar_gen2_read_mode_pins(void)
|
||||
{
|
||||
void __iomem *modemr = ioremap_nocache(MODEMR, 4);
|
||||
u32 mode;
|
||||
static u32 mode;
|
||||
static bool mode_valid;
|
||||
|
||||
BUG_ON(!modemr);
|
||||
mode = ioread32(modemr);
|
||||
iounmap(modemr);
|
||||
if (!mode_valid) {
|
||||
void __iomem *modemr = ioremap_nocache(MODEMR, 4);
|
||||
BUG_ON(!modemr);
|
||||
mode = ioread32(modemr);
|
||||
iounmap(modemr);
|
||||
mode_valid = true;
|
||||
}
|
||||
|
||||
return mode;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -24,7 +24,6 @@
|
|||
#include <linux/io.h>
|
||||
#include <linux/delay.h>
|
||||
#include <mach/common.h>
|
||||
#include <mach/emev2.h>
|
||||
#include <asm/smp_plat.h>
|
||||
#include <asm/smp_scu.h>
|
||||
|
||||
|
|
|
|||
|
|
@ -20,6 +20,7 @@
|
|||
#include <asm/smp_plat.h>
|
||||
#include <mach/common.h>
|
||||
#include <mach/r8a7791.h>
|
||||
#include <mach/rcar-gen2.h>
|
||||
|
||||
#define RST 0xe6160000
|
||||
#define CA15BAR 0x0020
|
||||
|
|
@ -51,9 +52,21 @@ static void __init r8a7791_smp_prepare_cpus(unsigned int max_cpus)
|
|||
iounmap(p);
|
||||
}
|
||||
|
||||
static int r8a7791_smp_boot_secondary(unsigned int cpu,
|
||||
struct task_struct *idle)
|
||||
{
|
||||
/* Error out when hardware debug mode is enabled */
|
||||
if (rcar_gen2_read_mode_pins() & BIT(21)) {
|
||||
pr_warn("Unable to boot CPU%u when MD21 is set\n", cpu);
|
||||
return -ENOTSUPP;
|
||||
}
|
||||
|
||||
return shmobile_smp_apmu_boot_secondary(cpu, idle);
|
||||
}
|
||||
|
||||
struct smp_operations r8a7791_smp_ops __initdata = {
|
||||
.smp_prepare_cpus = r8a7791_smp_prepare_cpus,
|
||||
.smp_boot_secondary = shmobile_smp_apmu_boot_secondary,
|
||||
.smp_boot_secondary = r8a7791_smp_boot_secondary,
|
||||
#ifdef CONFIG_HOTPLUG_CPU
|
||||
.cpu_disable = shmobile_smp_cpu_disable,
|
||||
.cpu_die = shmobile_smp_apmu_cpu_die,
|
||||
|
|
|
|||
|
|
@ -21,6 +21,7 @@
|
|||
#include <linux/platform_device.h>
|
||||
#include <linux/clocksource.h>
|
||||
#include <linux/delay.h>
|
||||
#include <linux/of_address.h>
|
||||
|
||||
void __init shmobile_setup_delay(unsigned int max_cpu_core_mhz,
|
||||
unsigned int mult, unsigned int div)
|
||||
|
|
@ -39,6 +40,33 @@ void __init shmobile_setup_delay(unsigned int max_cpu_core_mhz,
|
|||
preset_lpj = max_cpu_core_mhz * value;
|
||||
}
|
||||
|
||||
void __init shmobile_init_delay(void)
|
||||
{
|
||||
struct device_node *np, *parent;
|
||||
u32 max_freq, freq;
|
||||
|
||||
max_freq = 0;
|
||||
|
||||
parent = of_find_node_by_path("/cpus");
|
||||
if (parent) {
|
||||
for_each_child_of_node(parent, np) {
|
||||
if (!of_property_read_u32(np, "clock-frequency", &freq))
|
||||
max_freq = max(max_freq, freq);
|
||||
}
|
||||
of_node_put(parent);
|
||||
}
|
||||
|
||||
if (max_freq) {
|
||||
if (of_find_compatible_node(NULL, NULL, "arm,cortex-a8"))
|
||||
shmobile_setup_delay(max_freq, 1, 3);
|
||||
else if (of_find_compatible_node(NULL, NULL, "arm,cortex-a9"))
|
||||
shmobile_setup_delay(max_freq, 1, 3);
|
||||
else if (of_find_compatible_node(NULL, NULL, "arm,cortex-a15"))
|
||||
if (!IS_ENABLED(CONFIG_ARM_ARCH_TIMER))
|
||||
shmobile_setup_delay(max_freq, 2, 4);
|
||||
}
|
||||
}
|
||||
|
||||
static void __init shmobile_late_time_init(void)
|
||||
{
|
||||
/*
|
||||
|
|
|
|||
Loading…
Reference in a new issue