tools/power turbostat: be more useful as non-root
Don't exit if used this way: sudo setcap cap_sys_nice,cap_sys_rawio=+ep ./turbostat sudo chmod +r /dev/cpu/*/msr ./turbostat note: cap_sys_admin is now also needed for the perf IPC counter: sudo setcap cap_sys_admin,cap_sys_nice,cap_sys_rawio=+ep ./turbostat Reported-by: Artem S. Tashkinov <aros@gmx.com> Reported-by: Toby Broom <tbroom@outlook.com> Signed-off-by: Len Brown <len.brown@intel.com>
This commit is contained in:
Len Brown
parent
6397b64189
commit
164d7a965b
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@ -292,7 +292,7 @@ starts a new interval.
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must be run as root.
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Alternatively, non-root users can be enabled to run turbostat this way:
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# setcap cap_sys_rawio=ep ./turbostat
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# setcap cap_sys_admin,cap_sys_rawio,cap_sys_nice=+ep ./turbostat
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# chmod +r /dev/cpu/*/msr
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@ -37,6 +37,169 @@
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#include <asm/unistd.h>
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#include <stdbool.h>
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/*
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* This list matches the column headers, except
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* 1. built-in only, the sysfs counters are not here -- we learn of those at run-time
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* 2. Core and CPU are moved to the end, we can't have strings that contain them
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* matching on them for --show and --hide.
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*/
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/*
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* buffer size used by sscanf() for added column names
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* Usually truncated to 7 characters, but also handles 18 columns for raw 64-bit counters
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*/
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#define NAME_BYTES 20
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#define PATH_BYTES 128
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enum counter_scope { SCOPE_CPU, SCOPE_CORE, SCOPE_PACKAGE };
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enum counter_type { COUNTER_ITEMS, COUNTER_CYCLES, COUNTER_SECONDS, COUNTER_USEC };
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enum counter_format { FORMAT_RAW, FORMAT_DELTA, FORMAT_PERCENT };
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struct msr_counter {
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unsigned int msr_num;
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char name[NAME_BYTES];
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char path[PATH_BYTES];
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unsigned int width;
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enum counter_type type;
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enum counter_format format;
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struct msr_counter *next;
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unsigned int flags;
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#define FLAGS_HIDE (1 << 0)
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#define FLAGS_SHOW (1 << 1)
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#define SYSFS_PERCPU (1 << 1)
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};
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struct msr_counter bic[] = {
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{ 0x0, "usec" },
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{ 0x0, "Time_Of_Day_Seconds" },
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{ 0x0, "Package" },
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{ 0x0, "Node" },
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{ 0x0, "Avg_MHz" },
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{ 0x0, "Busy%" },
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{ 0x0, "Bzy_MHz" },
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{ 0x0, "TSC_MHz" },
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{ 0x0, "IRQ" },
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{ 0x0, "SMI", "", 32, 0, FORMAT_DELTA, NULL },
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{ 0x0, "sysfs" },
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{ 0x0, "CPU%c1" },
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{ 0x0, "CPU%c3" },
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{ 0x0, "CPU%c6" },
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{ 0x0, "CPU%c7" },
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{ 0x0, "ThreadC" },
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{ 0x0, "CoreTmp" },
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{ 0x0, "CoreCnt" },
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{ 0x0, "PkgTmp" },
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{ 0x0, "GFX%rc6" },
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{ 0x0, "GFXMHz" },
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{ 0x0, "Pkg%pc2" },
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{ 0x0, "Pkg%pc3" },
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{ 0x0, "Pkg%pc6" },
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{ 0x0, "Pkg%pc7" },
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{ 0x0, "Pkg%pc8" },
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{ 0x0, "Pkg%pc9" },
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{ 0x0, "Pk%pc10" },
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{ 0x0, "CPU%LPI" },
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{ 0x0, "SYS%LPI" },
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{ 0x0, "PkgWatt" },
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{ 0x0, "CorWatt" },
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{ 0x0, "GFXWatt" },
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{ 0x0, "PkgCnt" },
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{ 0x0, "RAMWatt" },
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{ 0x0, "PKG_%" },
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{ 0x0, "RAM_%" },
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{ 0x0, "Pkg_J" },
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{ 0x0, "Cor_J" },
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{ 0x0, "GFX_J" },
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{ 0x0, "RAM_J" },
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{ 0x0, "Mod%c6" },
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{ 0x0, "Totl%C0" },
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{ 0x0, "Any%C0" },
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{ 0x0, "GFX%C0" },
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{ 0x0, "CPUGFX%" },
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{ 0x0, "Core" },
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{ 0x0, "CPU" },
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{ 0x0, "APIC" },
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{ 0x0, "X2APIC" },
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{ 0x0, "Die" },
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{ 0x0, "GFXAMHz" },
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{ 0x0, "IPC" },
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{ 0x0, "CoreThr" },
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};
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#define MAX_BIC (sizeof(bic) / sizeof(struct msr_counter))
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#define BIC_USEC (1ULL << 0)
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#define BIC_TOD (1ULL << 1)
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#define BIC_Package (1ULL << 2)
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#define BIC_Node (1ULL << 3)
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#define BIC_Avg_MHz (1ULL << 4)
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#define BIC_Busy (1ULL << 5)
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#define BIC_Bzy_MHz (1ULL << 6)
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#define BIC_TSC_MHz (1ULL << 7)
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#define BIC_IRQ (1ULL << 8)
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#define BIC_SMI (1ULL << 9)
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#define BIC_sysfs (1ULL << 10)
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#define BIC_CPU_c1 (1ULL << 11)
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#define BIC_CPU_c3 (1ULL << 12)
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#define BIC_CPU_c6 (1ULL << 13)
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#define BIC_CPU_c7 (1ULL << 14)
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#define BIC_ThreadC (1ULL << 15)
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#define BIC_CoreTmp (1ULL << 16)
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#define BIC_CoreCnt (1ULL << 17)
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#define BIC_PkgTmp (1ULL << 18)
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#define BIC_GFX_rc6 (1ULL << 19)
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#define BIC_GFXMHz (1ULL << 20)
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#define BIC_Pkgpc2 (1ULL << 21)
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#define BIC_Pkgpc3 (1ULL << 22)
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#define BIC_Pkgpc6 (1ULL << 23)
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#define BIC_Pkgpc7 (1ULL << 24)
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#define BIC_Pkgpc8 (1ULL << 25)
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#define BIC_Pkgpc9 (1ULL << 26)
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#define BIC_Pkgpc10 (1ULL << 27)
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#define BIC_CPU_LPI (1ULL << 28)
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#define BIC_SYS_LPI (1ULL << 29)
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#define BIC_PkgWatt (1ULL << 30)
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#define BIC_CorWatt (1ULL << 31)
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#define BIC_GFXWatt (1ULL << 32)
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#define BIC_PkgCnt (1ULL << 33)
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#define BIC_RAMWatt (1ULL << 34)
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#define BIC_PKG__ (1ULL << 35)
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#define BIC_RAM__ (1ULL << 36)
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#define BIC_Pkg_J (1ULL << 37)
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#define BIC_Cor_J (1ULL << 38)
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#define BIC_GFX_J (1ULL << 39)
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#define BIC_RAM_J (1ULL << 40)
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#define BIC_Mod_c6 (1ULL << 41)
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#define BIC_Totl_c0 (1ULL << 42)
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#define BIC_Any_c0 (1ULL << 43)
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#define BIC_GFX_c0 (1ULL << 44)
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#define BIC_CPUGFX (1ULL << 45)
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#define BIC_Core (1ULL << 46)
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#define BIC_CPU (1ULL << 47)
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#define BIC_APIC (1ULL << 48)
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#define BIC_X2APIC (1ULL << 49)
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#define BIC_Die (1ULL << 50)
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#define BIC_GFXACTMHz (1ULL << 51)
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#define BIC_IPC (1ULL << 52)
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#define BIC_CORE_THROT_CNT (1ULL << 53)
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#define BIC_TOPOLOGY (BIC_Package | BIC_Node | BIC_CoreCnt | BIC_PkgCnt | BIC_Core | BIC_CPU | BIC_Die )
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#define BIC_THERMAL_PWR ( BIC_CoreTmp | BIC_PkgTmp | BIC_PkgWatt | BIC_CorWatt | BIC_GFXWatt | BIC_RAMWatt | BIC_PKG__ | BIC_RAM__)
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#define BIC_FREQUENCY ( BIC_Avg_MHz | BIC_Busy | BIC_Bzy_MHz | BIC_TSC_MHz | BIC_GFXMHz | BIC_GFXACTMHz )
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#define BIC_IDLE ( BIC_sysfs | BIC_CPU_c1 | BIC_CPU_c3 | BIC_CPU_c6 | BIC_CPU_c7 | BIC_GFX_rc6 | BIC_Pkgpc2 | BIC_Pkgpc3 | BIC_Pkgpc6 | BIC_Pkgpc7 | BIC_Pkgpc8 | BIC_Pkgpc9 | BIC_Pkgpc10 | BIC_CPU_LPI | BIC_SYS_LPI | BIC_Mod_c6 | BIC_Totl_c0 | BIC_Any_c0 | BIC_GFX_c0 | BIC_CPUGFX)
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#define BIC_OTHER ( BIC_IRQ | BIC_SMI | BIC_ThreadC | BIC_CoreTmp | BIC_IPC)
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#define BIC_DISABLED_BY_DEFAULT (BIC_USEC | BIC_TOD | BIC_APIC | BIC_X2APIC)
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unsigned long long bic_enabled = (0xFFFFFFFFFFFFFFFFULL & ~BIC_DISABLED_BY_DEFAULT);
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unsigned long long bic_present = BIC_USEC | BIC_TOD | BIC_sysfs | BIC_APIC | BIC_X2APIC;
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#define DO_BIC(COUNTER_NAME) (bic_enabled & bic_present & COUNTER_NAME)
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#define DO_BIC_READ(COUNTER_NAME) (bic_present & COUNTER_NAME)
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#define ENABLE_BIC(COUNTER_NAME) (bic_enabled |= COUNTER_NAME)
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#define BIC_PRESENT(COUNTER_BIT) (bic_present |= COUNTER_BIT)
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#define BIC_NOT_PRESENT(COUNTER_BIT) (bic_present &= ~COUNTER_BIT)
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#define BIC_IS_ENABLED(COUNTER_BIT) (bic_enabled & COUNTER_BIT)
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char *proc_stat = "/proc/stat";
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FILE *outf;
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int *fd_percpu;
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@ -160,13 +323,6 @@ int ignore_stdin;
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#define MAX(a, b) ((a) > (b) ? (a) : (b))
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/*
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* buffer size used by sscanf() for added column names
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* Usually truncated to 7 characters, but also handles 18 columns for raw 64-bit counters
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*/
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#define NAME_BYTES 20
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#define PATH_BYTES 128
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int backwards_count;
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char *progname;
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@ -257,24 +413,6 @@ struct pkg_data {
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#define GET_PKG(pkg_base, pkg_no) (pkg_base + pkg_no)
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enum counter_scope { SCOPE_CPU, SCOPE_CORE, SCOPE_PACKAGE };
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enum counter_type { COUNTER_ITEMS, COUNTER_CYCLES, COUNTER_SECONDS, COUNTER_USEC };
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enum counter_format { FORMAT_RAW, FORMAT_DELTA, FORMAT_PERCENT };
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struct msr_counter {
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unsigned int msr_num;
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char name[NAME_BYTES];
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char path[PATH_BYTES];
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unsigned int width;
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enum counter_type type;
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enum counter_format format;
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struct msr_counter *next;
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unsigned int flags;
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#define FLAGS_HIDE (1 << 0)
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#define FLAGS_SHOW (1 << 1)
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#define SYSFS_PERCPU (1 << 1)
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};
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/*
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* The accumulated sum of MSR is defined as a monotonic
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* increasing MSR, it will be accumulated periodically,
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@ -524,8 +662,10 @@ static int perf_instr_count_open(int cpu_num)
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/* counter for cpu_num, including user + kernel and all processes */
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fd = perf_event_open(&pea, -1, cpu_num, -1, 0);
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if (fd == -1)
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err(-1, "cpu%d: perf instruction counter\n", cpu_num);
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if (fd == -1) {
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warn("cpu%d: perf instruction counter", cpu_num);
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BIC_NOT_PRESENT(BIC_IPC);
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}
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return fd;
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}
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@ -552,143 +692,6 @@ int get_msr(int cpu, off_t offset, unsigned long long *msr)
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return 0;
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}
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/*
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* This list matches the column headers, except
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* 1. built-in only, the sysfs counters are not here -- we learn of those at run-time
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* 2. Core and CPU are moved to the end, we can't have strings that contain them
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* matching on them for --show and --hide.
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*/
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struct msr_counter bic[] = {
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{ 0x0, "usec" },
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{ 0x0, "Time_Of_Day_Seconds" },
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{ 0x0, "Package" },
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{ 0x0, "Node" },
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{ 0x0, "Avg_MHz" },
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{ 0x0, "Busy%" },
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{ 0x0, "Bzy_MHz" },
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{ 0x0, "TSC_MHz" },
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{ 0x0, "IRQ" },
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{ 0x0, "SMI", "", 32, 0, FORMAT_DELTA, NULL },
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{ 0x0, "sysfs" },
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{ 0x0, "CPU%c1" },
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{ 0x0, "CPU%c3" },
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{ 0x0, "CPU%c6" },
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{ 0x0, "CPU%c7" },
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{ 0x0, "ThreadC" },
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{ 0x0, "CoreTmp" },
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{ 0x0, "CoreCnt" },
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{ 0x0, "PkgTmp" },
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{ 0x0, "GFX%rc6" },
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{ 0x0, "GFXMHz" },
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{ 0x0, "Pkg%pc2" },
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{ 0x0, "Pkg%pc3" },
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{ 0x0, "Pkg%pc6" },
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{ 0x0, "Pkg%pc7" },
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{ 0x0, "Pkg%pc8" },
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{ 0x0, "Pkg%pc9" },
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{ 0x0, "Pk%pc10" },
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{ 0x0, "CPU%LPI" },
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{ 0x0, "SYS%LPI" },
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{ 0x0, "PkgWatt" },
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{ 0x0, "CorWatt" },
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{ 0x0, "GFXWatt" },
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{ 0x0, "PkgCnt" },
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{ 0x0, "RAMWatt" },
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{ 0x0, "PKG_%" },
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{ 0x0, "RAM_%" },
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{ 0x0, "Pkg_J" },
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{ 0x0, "Cor_J" },
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{ 0x0, "GFX_J" },
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{ 0x0, "RAM_J" },
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{ 0x0, "Mod%c6" },
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{ 0x0, "Totl%C0" },
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{ 0x0, "Any%C0" },
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{ 0x0, "GFX%C0" },
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{ 0x0, "CPUGFX%" },
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{ 0x0, "Core" },
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{ 0x0, "CPU" },
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{ 0x0, "APIC" },
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{ 0x0, "X2APIC" },
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{ 0x0, "Die" },
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{ 0x0, "GFXAMHz" },
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{ 0x0, "IPC" },
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{ 0x0, "CoreThr" },
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};
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#define MAX_BIC (sizeof(bic) / sizeof(struct msr_counter))
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#define BIC_USEC (1ULL << 0)
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#define BIC_TOD (1ULL << 1)
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#define BIC_Package (1ULL << 2)
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#define BIC_Node (1ULL << 3)
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#define BIC_Avg_MHz (1ULL << 4)
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#define BIC_Busy (1ULL << 5)
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#define BIC_Bzy_MHz (1ULL << 6)
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#define BIC_TSC_MHz (1ULL << 7)
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#define BIC_IRQ (1ULL << 8)
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#define BIC_SMI (1ULL << 9)
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#define BIC_sysfs (1ULL << 10)
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#define BIC_CPU_c1 (1ULL << 11)
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#define BIC_CPU_c3 (1ULL << 12)
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#define BIC_CPU_c6 (1ULL << 13)
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#define BIC_CPU_c7 (1ULL << 14)
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#define BIC_ThreadC (1ULL << 15)
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#define BIC_CoreTmp (1ULL << 16)
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#define BIC_CoreCnt (1ULL << 17)
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#define BIC_PkgTmp (1ULL << 18)
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#define BIC_GFX_rc6 (1ULL << 19)
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#define BIC_GFXMHz (1ULL << 20)
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#define BIC_Pkgpc2 (1ULL << 21)
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#define BIC_Pkgpc3 (1ULL << 22)
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#define BIC_Pkgpc6 (1ULL << 23)
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#define BIC_Pkgpc7 (1ULL << 24)
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#define BIC_Pkgpc8 (1ULL << 25)
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#define BIC_Pkgpc9 (1ULL << 26)
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#define BIC_Pkgpc10 (1ULL << 27)
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#define BIC_CPU_LPI (1ULL << 28)
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#define BIC_SYS_LPI (1ULL << 29)
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#define BIC_PkgWatt (1ULL << 30)
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#define BIC_CorWatt (1ULL << 31)
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#define BIC_GFXWatt (1ULL << 32)
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#define BIC_PkgCnt (1ULL << 33)
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#define BIC_RAMWatt (1ULL << 34)
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#define BIC_PKG__ (1ULL << 35)
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#define BIC_RAM__ (1ULL << 36)
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#define BIC_Pkg_J (1ULL << 37)
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#define BIC_Cor_J (1ULL << 38)
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#define BIC_GFX_J (1ULL << 39)
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#define BIC_RAM_J (1ULL << 40)
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#define BIC_Mod_c6 (1ULL << 41)
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#define BIC_Totl_c0 (1ULL << 42)
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#define BIC_Any_c0 (1ULL << 43)
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#define BIC_GFX_c0 (1ULL << 44)
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#define BIC_CPUGFX (1ULL << 45)
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#define BIC_Core (1ULL << 46)
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#define BIC_CPU (1ULL << 47)
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#define BIC_APIC (1ULL << 48)
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#define BIC_X2APIC (1ULL << 49)
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#define BIC_Die (1ULL << 50)
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#define BIC_GFXACTMHz (1ULL << 51)
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#define BIC_IPC (1ULL << 52)
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#define BIC_CORE_THROT_CNT (1ULL << 53)
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#define BIC_TOPOLOGY (BIC_Package | BIC_Node | BIC_CoreCnt | BIC_PkgCnt | BIC_Core | BIC_CPU | BIC_Die )
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#define BIC_THERMAL_PWR ( BIC_CoreTmp | BIC_PkgTmp | BIC_PkgWatt | BIC_CorWatt | BIC_GFXWatt | BIC_RAMWatt | BIC_PKG__ | BIC_RAM__)
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#define BIC_FREQUENCY ( BIC_Avg_MHz | BIC_Busy | BIC_Bzy_MHz | BIC_TSC_MHz | BIC_GFXMHz | BIC_GFXACTMHz )
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#define BIC_IDLE ( BIC_sysfs | BIC_CPU_c1 | BIC_CPU_c3 | BIC_CPU_c6 | BIC_CPU_c7 | BIC_GFX_rc6 | BIC_Pkgpc2 | BIC_Pkgpc3 | BIC_Pkgpc6 | BIC_Pkgpc7 | BIC_Pkgpc8 | BIC_Pkgpc9 | BIC_Pkgpc10 | BIC_CPU_LPI | BIC_SYS_LPI | BIC_Mod_c6 | BIC_Totl_c0 | BIC_Any_c0 | BIC_GFX_c0 | BIC_CPUGFX)
|
||||
#define BIC_OTHER ( BIC_IRQ | BIC_SMI | BIC_ThreadC | BIC_CoreTmp | BIC_IPC)
|
||||
|
||||
#define BIC_DISABLED_BY_DEFAULT (BIC_USEC | BIC_TOD | BIC_APIC | BIC_X2APIC)
|
||||
|
||||
unsigned long long bic_enabled = (0xFFFFFFFFFFFFFFFFULL & ~BIC_DISABLED_BY_DEFAULT);
|
||||
unsigned long long bic_present = BIC_USEC | BIC_TOD | BIC_sysfs | BIC_APIC | BIC_X2APIC;
|
||||
|
||||
#define DO_BIC(COUNTER_NAME) (bic_enabled & bic_present & COUNTER_NAME)
|
||||
#define DO_BIC_READ(COUNTER_NAME) (bic_present & COUNTER_NAME)
|
||||
#define ENABLE_BIC(COUNTER_NAME) (bic_enabled |= COUNTER_NAME)
|
||||
#define BIC_PRESENT(COUNTER_BIT) (bic_present |= COUNTER_BIT)
|
||||
#define BIC_NOT_PRESENT(COUNTER_BIT) (bic_present &= ~COUNTER_BIT)
|
||||
#define BIC_IS_ENABLED(COUNTER_BIT) (bic_enabled & COUNTER_BIT)
|
||||
|
||||
#define MAX_DEFERRED 16
|
||||
char *deferred_add_names[MAX_DEFERRED];
|
||||
char *deferred_skip_names[MAX_DEFERRED];
|
||||
|
|
@ -791,7 +794,7 @@ unsigned long long bic_lookup(char *name_list, enum show_hide_mode mode)
|
|||
deferred_add_names[deferred_add_index++] = name_list;
|
||||
if (deferred_add_index >= MAX_DEFERRED) {
|
||||
fprintf(stderr, "More than max %d un-recognized --add options '%s'\n",
|
||||
MAX_DEFERRED, name_list);
|
||||
MAX_DEFERRED, name_list);
|
||||
help();
|
||||
exit(1);
|
||||
}
|
||||
|
|
@ -801,7 +804,7 @@ unsigned long long bic_lookup(char *name_list, enum show_hide_mode mode)
|
|||
fprintf(stderr, "deferred \"%s\"\n", name_list);
|
||||
if (deferred_skip_index >= MAX_DEFERRED) {
|
||||
fprintf(stderr, "More than max %d un-recognized --skip options '%s'\n",
|
||||
MAX_DEFERRED, name_list);
|
||||
MAX_DEFERRED, name_list);
|
||||
help();
|
||||
exit(1);
|
||||
}
|
||||
|
|
@ -3493,6 +3496,9 @@ release_msr:
|
|||
/*
|
||||
* set_my_sched_priority(pri)
|
||||
* return previous
|
||||
*
|
||||
* if non-root, do this:
|
||||
* # /sbin/setcap cap_sys_rawio,cap_sys_nice=+ep /usr/bin/turbostat
|
||||
*/
|
||||
int set_my_sched_priority(int priority)
|
||||
{
|
||||
|
|
@ -3511,7 +3517,7 @@ int set_my_sched_priority(int priority)
|
|||
errno = 0;
|
||||
retval = getpriority(PRIO_PROCESS, 0);
|
||||
if (retval != priority)
|
||||
err(-1, "getpriority(%d) != setpriority(%d)", retval, priority);
|
||||
err(retval, "getpriority(%d) != setpriority(%d)", retval, priority);
|
||||
|
||||
return original_priority;
|
||||
}
|
||||
|
|
@ -4829,9 +4835,7 @@ int print_rapl(struct thread_data *t, struct core_data *c, struct pkg_data *p)
|
|||
|
||||
fprintf(outf, "cpu%d: MSR_VR_CURRENT_CONFIG: 0x%08llx\n", cpu, msr);
|
||||
fprintf(outf, "cpu%d: PKG Limit #4: %f Watts (%slocked)\n",
|
||||
cpu,
|
||||
((msr >> 0) & 0x1FFF) * rapl_power_units,
|
||||
(msr >> 31) & 1 ? "" : "UN");
|
||||
cpu, ((msr >> 0) & 0x1FFF) * rapl_power_units, (msr >> 31) & 1 ? "" : "UN");
|
||||
}
|
||||
|
||||
if (do_rapl & RAPL_DRAM_POWER_INFO) {
|
||||
|
|
@ -5965,6 +5969,9 @@ void turbostat_init()
|
|||
|
||||
if (!quiet && do_irtl_snb)
|
||||
print_irtl();
|
||||
|
||||
if (DO_BIC(BIC_IPC))
|
||||
(void)get_instr_count_fd(base_cpu);
|
||||
}
|
||||
|
||||
int fork_it(char **argv)
|
||||
|
|
@ -6481,8 +6488,7 @@ void cmdline(int argc, char **argv)
|
|||
header_iterations = strtod(optarg, NULL);
|
||||
|
||||
if (header_iterations <= 0) {
|
||||
fprintf(outf, "iterations %d should be positive number\n",
|
||||
header_iterations);
|
||||
fprintf(outf, "iterations %d should be positive number\n", header_iterations);
|
||||
exit(2);
|
||||
}
|
||||
break;
|
||||
|
|
|
|||
Loading…
Reference in New Issue