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mtd: nand: kill NAND_NO_READRDY
According to its documentation, the NAND_NO_READRDY option is always used when autoincrement is not supported. Autoincrement support was recently dropped, so we can drop this options as well (defaulting to "no read ready check"). Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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63d99c0e89
commit
1696e6bc2a
6 changed files with 2 additions and 28 deletions
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@ -805,7 +805,6 @@ static int fsl_elbc_chip_init(struct fsl_elbc_mtd *priv)
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chip->bbt_md = &bbt_mirror_descr;
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/* set up nand options */
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chip->options = NAND_NO_READRDY;
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chip->bbt_options = NAND_BBT_USE_FLASH;
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chip->controller = &elbc_fcm_ctrl->controller;
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@ -805,7 +805,6 @@ static int fsl_ifc_chip_init(struct fsl_ifc_mtd *priv)
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out_be32(&ifc->ifc_nand.ncfgr, 0x0);
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/* set up nand options */
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chip->options = NAND_NO_READRDY;
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chip->bbt_options = NAND_BBT_USE_FLASH;
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@ -1565,14 +1565,6 @@ static int nand_do_read_ops(struct mtd_info *mtd, loff_t from,
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oobreadlen -= toread;
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}
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}
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if (!(chip->options & NAND_NO_READRDY)) {
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/* Apply delay or wait for ready/busy pin */
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if (!chip->dev_ready)
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udelay(chip->chip_delay);
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else
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nand_wait_ready(mtd);
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}
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} else {
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memcpy(buf, chip->buffers->databuf + col, bytes);
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buf += bytes;
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@ -1837,14 +1829,6 @@ static int nand_do_read_oob(struct mtd_info *mtd, loff_t from,
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len = min(len, readlen);
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buf = nand_transfer_oob(chip, buf, ops, len);
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if (!(chip->options & NAND_NO_READRDY)) {
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/* Apply delay or wait for ready/busy pin */
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if (!chip->dev_ready)
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udelay(chip->chip_delay);
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else
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nand_wait_ready(mtd);
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}
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readlen -= len;
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if (!readlen)
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break;
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@ -2915,7 +2899,6 @@ static int nand_flash_detect_onfi(struct mtd_info *mtd, struct nand_chip *chip,
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*busw = NAND_BUSWIDTH_16;
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chip->options &= ~NAND_CHIPOPTIONS_MSK;
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chip->options |= NAND_NO_READRDY & NAND_CHIPOPTIONS_MSK;
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pr_info("ONFI flash detected\n");
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return 1;
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@ -70,7 +70,7 @@ struct nand_flash_dev nand_flash_ids[] = {
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* These are the new chips with large page size. The pagesize and the
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* erasesize is determined from the extended id bytes
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*/
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#define LP_OPTIONS (NAND_SAMSUNG_LP_OPTIONS | NAND_NO_READRDY)
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#define LP_OPTIONS NAND_SAMSUNG_LP_OPTIONS
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#define LP_OPTIONS16 (LP_OPTIONS | NAND_BUSWIDTH_16)
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/* 512 Megabit */
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@ -157,7 +157,7 @@ struct nand_flash_dev nand_flash_ids[] = {
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* writes possible, but not implemented now
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*/
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{"AND 128MiB 3,3V 8-bit", 0x01, 2048, 128, 0x4000,
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NAND_IS_AND | NAND_NO_READRDY | NAND_4PAGE_ARRAY | BBT_AUTO_REFRESH},
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NAND_IS_AND | NAND_4PAGE_ARRAY | BBT_AUTO_REFRESH},
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{NULL,}
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};
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@ -1005,7 +1005,6 @@ static int pxa3xx_nand_scan(struct mtd_info *mtd)
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chip->ecc.size = host->page_size;
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chip->ecc.strength = 1;
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chip->options |= NAND_NO_READRDY;
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if (host->reg_ndcr & NDCR_DWIDTH_M)
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chip->options |= NAND_BUSWIDTH_16;
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@ -185,12 +185,6 @@ typedef enum {
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* This happens with the Renesas AG-AND chips, possibly others.
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*/
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#define BBT_AUTO_REFRESH 0x00000080
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/*
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* Chip does not require ready check on read. True
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* for all large page devices, as they do not support
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* autoincrement.
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*/
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#define NAND_NO_READRDY 0x00000100
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/* Chip does not allow subpage writes */
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#define NAND_NO_SUBPAGE_WRITE 0x00000200
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