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gpio: samsung: add devicetree init for s3c24xx arches
Until now the EXYNOS-SoC was the only Samsung-SoC supporting the GPIOs via the device tree. This patch implements dt-support for the s3c24xx arches. The controllers contain only 3 cells, as the underlying gpio controller does not support controlling the drive strength on a gpio level. Tested with the gpio-keys driver on a s3c2416 based machine. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Thomas Abraham <thomas.abraham@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> [kgene.kim@samsung.com: fixed build error] Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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@ -39,3 +39,46 @@ Example:
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#gpio-cells = <4>;
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gpio-controller;
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};
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Samsung S3C24XX GPIO Controller
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Required properties:
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- compatible: Compatible property value should be "samsung,s3c24xx-gpio".
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- reg: Physical base address of the controller and length of memory mapped
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region.
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- #gpio-cells: Should be 3. The syntax of the gpio specifier used by client nodes
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should be the following with values derived from the SoC user manual.
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<[phandle of the gpio controller node]
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[pin number within the gpio controller]
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[mux function]
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[flags and pull up/down]
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Values for gpio specifier:
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- Pin number: depending on the controller a number from 0 up to 15.
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- Mux function: Depending on the SoC and the gpio bank the gpio can be set
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as input, output or a special function
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- Flags and Pull Up/Down: the values to use differ for the individual SoCs
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example S3C2416/S3C2450:
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0 - Pull Up/Down Disabled.
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1 - Pull Down Enabled.
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2 - Pull Up Enabled.
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Bit 16 (0x00010000) - Input is active low.
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Consult the user manual for the correct values of Mux and Pull Up/Down.
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- gpio-controller: Specifies that the node is a gpio controller.
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- #address-cells: should be 1.
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- #size-cells: should be 1.
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Example:
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gpa: gpio-controller@56000000 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "samsung,s3c24xx-gpio";
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reg = <0x56000000 0x10>;
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#gpio-cells = <3>;
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gpio-controller;
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};
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@ -938,6 +938,67 @@ static void __init samsung_gpiolib_add(struct samsung_gpio_chip *chip)
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s3c_gpiolib_track(chip);
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}
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#if defined(CONFIG_PLAT_S3C24XX) && defined(CONFIG_OF)
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static int s3c24xx_gpio_xlate(struct gpio_chip *gc,
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const struct of_phandle_args *gpiospec, u32 *flags)
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{
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unsigned int pin;
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if (WARN_ON(gc->of_gpio_n_cells < 3))
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return -EINVAL;
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if (WARN_ON(gpiospec->args_count < gc->of_gpio_n_cells))
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return -EINVAL;
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if (gpiospec->args[0] > gc->ngpio)
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return -EINVAL;
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pin = gc->base + gpiospec->args[0];
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if (s3c_gpio_cfgpin(pin, S3C_GPIO_SFN(gpiospec->args[1])))
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pr_warn("gpio_xlate: failed to set pin function\n");
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if (s3c_gpio_setpull(pin, gpiospec->args[2] & 0xffff))
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pr_warn("gpio_xlate: failed to set pin pull up/down\n");
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if (flags)
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*flags = gpiospec->args[2] >> 16;
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return gpiospec->args[0];
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}
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static const struct of_device_id s3c24xx_gpio_dt_match[] __initdata = {
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{ .compatible = "samsung,s3c24xx-gpio", },
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{}
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};
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static __init void s3c24xx_gpiolib_attach_ofnode(struct samsung_gpio_chip *chip,
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u64 base, u64 offset)
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{
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struct gpio_chip *gc = &chip->chip;
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u64 address;
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if (!of_have_populated_dt())
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return;
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address = chip->base ? base + ((u32)chip->base & 0xfff) : base + offset;
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gc->of_node = of_find_matching_node_by_address(NULL,
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s3c24xx_gpio_dt_match, address);
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if (!gc->of_node) {
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pr_info("gpio: device tree node not found for gpio controller"
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" with base address %08llx\n", address);
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return;
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}
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gc->of_gpio_n_cells = 3;
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gc->of_xlate = s3c24xx_gpio_xlate;
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}
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#else
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static __init void s3c24xx_gpiolib_attach_ofnode(struct samsung_gpio_chip *chip,
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u64 base, u64 offset)
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{
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return;
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}
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#endif /* defined(CONFIG_PLAT_S3C24XX) && defined(CONFIG_OF) */
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static void __init s3c24xx_gpiolib_add_chips(struct samsung_gpio_chip *chip,
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int nr_chips, void __iomem *base)
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{
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@ -962,6 +1023,8 @@ static void __init s3c24xx_gpiolib_add_chips(struct samsung_gpio_chip *chip,
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gc->direction_output = samsung_gpiolib_2bit_output;
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samsung_gpiolib_add(chip);
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s3c24xx_gpiolib_attach_ofnode(chip, S3C24XX_PA_GPIO, i * 0x10);
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}
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}
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